Date: Wed, 8 Mar 1995 17:52:13 -0500 From: mtaylor@gateway.cybernet.com (Mark J. Taylor) To: "Shawn M. Carey" <smcarey@mailbox.syr.edu> Cc: hackers@FreeBSD.org Subject: Re: ImageNation Corp. phone #? Message-ID: <v01510100ab83e0bdc0c6@[192.245.33.12]>
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>Hello,
>
> I recently noticed the ctx driver in the FreeBSD-current tree,
>and tried to contact the company about getting one or three of their
>cards. Unfortunately, the phone number listed in the driver comments
>is no longer correct. Does anyone know how I might reach this
>company, or if they still exist?
>
>Thanks,
>-Shawn Carey
I purchased a new Cortex-I framgrabber from ImageNation a few days ago. I
received it a day later.
Works fine using the ctx driver for 1.1.5.1 that I got directly from the
author (Paul LaFollette). I made a few small changes, but I emailed the
important one to Paul (regarding disabling the VGA 0xA0000 memory aperature
during Cortex read/write routines if the Cortex is set to use the same
aperature). Looking at -current, I don't see it there. I saved the email
I sent to Paul, so I'll include it here. Can someone please make sure that
these two changes (the following code and the phone number) get committed?
Their phone number (from their documentation, and verified):
(503) 641-7408
(800) 366-9131
They are located in Beaverton, Oregon.
The Cortex-I software that I got from you [Paul] works well at all
addresses (0xA0000, 0xB0000, 0xD0000, and 0xE0000), except that at address
0xA0000 you need to put a special case into the read and write routines
before you enable the RAM of the Cortex: you need to make the VGA adapter
let go of the RAM by writing to the Miscellaneous register. I've added two
lines of code to the read routine (and the same two lines to the write) to
do this:
int ctxwrite(dev_t dev, struct uio *uio)
{
.......
disable_intr();
/* Disable the VGA's ram access to 0xA0000 if necessary */
if (kvtop(sr->maddr) == 0xA0000) outb(0x03C2, inb(0x03CC) & 0xFD);
sr->cp1 |= RAM_ENABLE;
outb(sr->iobase+ctx_cp1, sr->cp1);
status = uiomove(sr->maddr + offset, count, uio);
sr->cp1 &= ~RAM_ENABLE;
outb(sr->iobase+ctx_cp1, sr->cp1);
/* Re-enable the VGA's ram access to 0xA0000 if necessary */
if (kvtop(sr->maddr) == 0xA0000) outb(0x03C2, inb(0x03CC) | 0x02);
enable_intr();
.......
}
int ctxread(dev_t dev, struct uio *uio)
{
.......
disable_intr();
/* Disable the VGA's ram access to 0xA0000 if necessary */
if (kvtop(sr->maddr) == 0xA0000) outb(0x03C2, inb(0x03CC) & 0xFD);
sr->cp1 |= RAM_ENABLE;
outb(sr->iobase+ctx_cp1, sr->cp1);
status = uiomove(sr->maddr + offset, count, uio);
sr->cp1 &= ~RAM_ENABLE;
outb(sr->iobase+ctx_cp1, sr->cp1);
/* Re-enable the VGA's ram access to 0xA0000 if necessary */
if (kvtop(sr->maddr) == 0xA0000) outb(0x03C2, inb(0x03CC) | 0x02);
enable_intr();
.......
}
As I said- I've tried all of the address spaces for the Cortex, and they
all work well. The reason that I cannot use any other address range
besides 0xA0000 is because of the damn Plug-and-Play on my P90 PCI board
(Intel Plato). I am not allowed to set up a shared memory segment larger
than 64 Kb (and it has to be contiguous!), which means that I get either
the Ethernet or the Cortex-I, not both! Putting the Cortex-I at address
0xA0000 works because that address space is automatically shared on the ISA
bus by the PCI controller. You may want to document this Plug-and-Play
problem in your driver's docs (just a little blurb). Or do a test like the
ethernet does during its probe: write a pattern to all of the shared
memory, and then read it all back to make sure that it is still the same
pattern.
BTW- I got the information about disabling the VGA's RAM space from the
Cortex-I manual, pages 74-75. Note that the above code will NOT work for
an EGA board, because most of the EGA registers are write-only.
If you do not use the added code above to disable the VGA's RAM page, then
I get a (mostly) black image when I grab one. Your results may vary based
on your video adapter card.
-Mark Taylor
Robotics Enginner
(313) 668-2567 voice
(313) 668-8780 fax
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