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Date:      Sun, 6 Sep 1998 14:32:31 +0000
From:      Niall Smart <rotel@indigo.ie>
To:        freebsd-smp@FreeBSD.ORG
Subject:   Dual Celeron A vs. Dual PII 
Message-ID:  <199809061332.OAA01409@indigo.ie>

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Hi,

The new Celeron A has 128K of cache which runs at CPU speed, there
is also a site which describes some modifications to it which can
be made to enable SMP.  Has anyone built such a system and have
they compared it to a dual PII?  Most popular benchmarks put the
Celeron A within 5% of the performance of a same clock speed PII
at the same clock rate, I was wondering if the same would hold at
SMP.  One thing that bothers me is the small cache size which would
probably lead to increased contention for the memory bus but with
a 100MHz memory bus speed would this be significant?

Regards,


Niall (el cheapo) Smart

-- 
Niall Smart, rotel@indigo.ie.
Amaze your friends and annoy your enemies:
echo '#define if(x) if (!(x))' >> /usr/include/stdio.h

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