Date: Sat, 30 Nov 2002 23:59:01 -0800 (PST) From: Scott Long <scottl@FreeBSD.org> To: cvs-committers@FreeBSD.org, cvs-all@FreeBSD.org Subject: cvs commit: src/sys/dev/aic7xxx aic79xx_pci.c Message-ID: <200212010759.gB17x1nN018277@repoman.freebsd.org>
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scottl 2002/11/30 23:59:01 PST
Modified files:
sys/dev/aic7xxx aic79xx_pci.c
Log:
Implement workaround for broken busfree-rev in the A4.
HP -> CPQ
Rearrange IDs to better match which chips they use.
Convert to uniform product description strings.
Simplify 7901A setup function.
Add the NONPACKFIFO_BUG and PACED_NEGTABLE_BUG entries
for the A.
Add rev B bugs and features.
The double write workaround for CURRSCB is only required if
abort pending is set. Remove this work around and set the
abort pending bug bit on the B at least until we have better
confirmation that the double write is always safe.
Add updated H2B identifiers
Move IOCell paramters into softc and add a hook for the
OSM to modify these as well as other settings prior to
committing them to the chip.
SLEW -> SLEWRATE
PREQDIS in DEVCONFIG1 went away after the A2.
Remove all code that references this bit. This
is especially important since this bit was reused
in the B for a different HW fix workaround.
Properly set the AHD_NEW_IOCELL_OPTS and
AHD_NEW_DFCNTRL_OPTS features for the B.
Remove stray/random extra 7901A generic PCI
table entry. Also switch the correct 7901A
generic entry to use ID_ALL_MASK since we
can only differentiate the 7901A from the
7902 by checking for a "type field" of 0xE.
Set AHD_INTCOLLISIONT_BUG for the Rev B.
Set the PREQDIS bit in DEVCONFIG1 for the B. The
bit is misnamed, but seems to disable a work-around
that breaks on the B on PCI busses.
Add a routine for testing memory mapped register access.
This will hopefully detect things like buggy via chipsets
so that the OSM can fallback to using I/O mapped access
when memory mapped I/O simply will not work.
Approved by: re (blanket)
Revision Changes Path
1.5 +148 -69 src/sys/dev/aic7xxx/aic79xx_pci.c
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