Date: Sun, 14 Sep 2003 16:50:20 -0700 (PDT) From: Peter Wemm <peter@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 38064 for review Message-ID: <200309142350.h8ENoKlu044704@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=38064 Change 38064 by peter@peter_work on 2003/09/14 16:49:55 initial updates Affected files ... .. //depot/projects/hammer/sys/amd64/isa/atpic.c#2 edit Differences ... ==== //depot/projects/hammer/sys/amd64/isa/atpic.c#2 (text+ko) ==== @@ -49,30 +49,12 @@ #include <machine/md_var.h> #include <machine/segments.h> -#include <i386/isa/icu.h> -#include <i386/isa/isa.h> +#include <amd64/isa/isa.h> +#include <amd64/isa/icu.h> + +#ifdef DEV_ISA #include <isa/isavar.h> - -/* XXX: Magic numbers */ -#ifdef PC98 -#ifdef AUTO_EOI_1 -#define MASTER_MODE 0x1f /* Master auto EOI, 8086 mode */ -#else -#define MASTER_MODE 0x1d /* Master 8086 mode */ #endif -#define SLAVE_MODE 9 /* 8086 mode */ -#else /* IBM-PC */ -#ifdef AUTO_EOI_1 -#define MASTER_MODE (2 | 1) /* Auto EOI, 8086 mode */ -#else -#define MASTER_MODE 1 /* 8086 mode */ -#endif -#ifdef AUTO_EOI_2 -#define SLAVE_MODE (2 | 1) /* Auto EOI, 8086 mode */ -#else -#define SLAVE_MODE 1 /* 8086 mode */ -#endif -#endif /* PC98 */ static void atpic_init(void *dummy); @@ -195,10 +177,10 @@ inthand_t *handler; int irq; #endif - register_t eflags; + register_t rflags; mtx_lock_spin(&icu_lock); - eflags = intr_disable(); + rflags = intr_disable(); #ifdef old irq = IRQ(ap, ai); ih = TAILQ_FIRST(&ai->at_intsrc.is_ithread->it_handlers); @@ -208,13 +190,11 @@ handler = ai->at_fastintr; } else handler = ai->at_intr; - setidt(ap->at_intbase + ai->at_irq, handler, SDT_SYS386IGT, SEL_KPL, - GSEL(GCODE_SEL, SEL_KPL)); + setidt(ap->at_intbase + ai->at_irq, handler, SDT_SYSIGT, SEL_KPL, 0); #else - setidt(ap->at_intbase + ai->at_irq, ai->at_intr, SDT_SYS386IGT, - SEL_KPL, GSEL(GCODE_SEL, SEL_KPL)); + setidt(ap->at_intbase + ai->at_irq, ai->at_intr, SDT_SYSIGT, SEL_KPL, 0); #endif - intr_restore(eflags); + intr_restore(rflags); mtx_unlock_spin(&icu_lock); } @@ -253,12 +233,7 @@ /* Reset the PIC and program with next four bytes. */ mtx_lock_spin(&icu_lock); -#ifdef DEV_MCA - if (MCA_system) - outb(pic->at_ioaddr, 0x19); - else -#endif - outb(pic->at_ioaddr, 0x11); + outb(pic->at_ioaddr, ICW1_RESET | ICW1_IC4); imr_addr = pic->at_ioaddr + ICU_IMR_OFFSET; /* Start vector. */ @@ -275,22 +250,30 @@ outb(imr_addr, IRQ_SLAVE); /* slave on line 7 */ /* Set mode. */ - if (slave) - outb(imr_addr, SLAVE_MODE); - else - outb(imr_addr, MASTER_MODE); + if (slave) { +#ifdef AUTO_EOI_2 + outb(imr_addr, ICW4_AEOI | ICW4_8086); +#else + outb(imr_addr, ICW4_8086); +#endif + } else { +#ifdef AUTO_EOI_1 + outb(imr_addr, ICW4_AEOI | ICW4_8086); +#else + outb(imr_addr, ICW4_8086); +#endif + } /* Set interrupt enable mask. */ outb(imr_addr, *pic->at_imen); /* Reset is finished, default to IRR on read. */ - outb(pic->at_ioaddr, 0x0a); + outb(pic->at_ioaddr, OCW3_SEL | OCW3_RIS); -#ifndef PC98 /* Set priority order to 3-7, 0-2 (com2 first). */ if (!slave) - outb(pic->at_ioaddr, 0xc0 | (3 - 1)); -#endif + outb(pic->at_ioaddr, ICU_SETPRI | 0x2); + mtx_unlock_spin(&icu_lock); }
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