Date: Sun, 12 Aug 2007 01:01:07 GMT From: Christopher Davis <loafier@FreeBSD.org> To: Perforce Change Reviews <perforce@FreeBSD.org> Subject: PERFORCE change 125072 for review Message-ID: <200708120101.l7C117Rx080661@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=125072 Change 125072 by loafier@chrisdsoc on 2007/08/12 01:00:38 Use bus_alloc_resources() and pci_enable_io and busmaster() Affected files ... .. //depot/projects/soc2007/loafier_busalloc/src/sys/dev/amr/amr_pci.c#2 edit .. //depot/projects/soc2007/loafier_busalloc/src/sys/dev/amr/amrreg.h#2 edit .. //depot/projects/soc2007/loafier_busalloc/src/sys/dev/amr/amrvar.h#2 edit Differences ... ==== //depot/projects/soc2007/loafier_busalloc/src/sys/dev/amr/amr_pci.c#2 (text+ko) ==== @@ -97,6 +97,18 @@ SYSCTL_UINT(_hw_amr, OID_AUTO, force_sg32, CTLFLAG_RDTUN, &amr_force_sg32, 0, "Force the AMR driver to use 32bit scatter gather"); +static struct resource_spec amr_res_spec_quartz[] = { + {SYS_RES_MEMORY, PCIR_BAR(0), RF_ACTIVE}, + {SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE}, + {-1, 0, 0} +}; + +static struct resource_spec amr_res_spec[] = { + {SYS_RES_IOPORT, PCIR_BAR(0), RF_ACTIVE}, + {SYS_RES_IRQ, 0, RF_ACTIVE | RF_SHAREABLE}, + {-1, 0, 0} +}; + static device_method_t amr_methods[] = { /* Device interface */ DEVMETHOD(device_probe, amr_pci_probe), @@ -183,10 +195,10 @@ static int amr_pci_attach(device_t dev) { + struct resource_spec *rtype; struct amr_softc *sc; struct amr_ident *id; - int rid, rtype, error; - u_int32_t command; + int error; debug_called(1); @@ -206,12 +218,11 @@ if ((id = amr_find_ident(dev)) == NULL) return (ENXIO); - command = pci_read_config(dev, PCIR_COMMAND, 1); if (id->flags & AMR_ID_QUARTZ) { /* * Make sure we are going to be able to talk to this board. */ - if ((command & PCIM_CMD_MEMEN) == 0) { + if (pci_enable_io(dev, SYS_RES_MEMORY) != 0) { device_printf(dev, "memory window not available\n"); return (ENXIO); } @@ -220,7 +231,7 @@ /* * Make sure we are going to be able to talk to this board. */ - if ((command & PCIM_CMD_PORTEN) == 0) { + if (pci_enable_io(dev, SYS_RES_IOPORT) != 0) { device_printf(dev, "I/O window not available\n"); return (ENXIO); } @@ -233,36 +244,21 @@ } /* force the busmaster enable bit on */ - if (!(command & PCIM_CMD_BUSMASTEREN)) { - device_printf(dev, "busmaster bit not set, enabling\n"); - command |= PCIM_CMD_BUSMASTEREN; - pci_write_config(dev, PCIR_COMMAND, command, 2); - } + pci_enable_busmaster(dev); /* * Allocate the PCI register window. */ - rid = PCIR_BAR(0); - rtype = AMR_IS_QUARTZ(sc) ? SYS_RES_MEMORY : SYS_RES_IOPORT; - sc->amr_reg = bus_alloc_resource_any(dev, rtype, &rid, RF_ACTIVE); - if (sc->amr_reg == NULL) { - device_printf(sc->amr_dev, "can't allocate register window\n"); - goto out; + rtype = AMR_IS_QUARTZ(sc) ? amr_res_spec_quartz : amr_res_spec; + if (bus_alloc_resources(dev, rtype, sc->amr_res) != 0) { + device_printf(sc->amr_dev, "can't allocate resources\n"); + goto out; } - sc->amr_btag = rman_get_bustag(sc->amr_reg); - sc->amr_bhandle = rman_get_bushandle(sc->amr_reg); /* - * Allocate and connect our interrupt. + * Connect our interrupt. */ - rid = 0; - sc->amr_irq = bus_alloc_resource_any(sc->amr_dev, SYS_RES_IRQ, &rid, - RF_SHAREABLE | RF_ACTIVE); - if (sc->amr_irq == NULL) { - device_printf(sc->amr_dev, "can't allocate interrupt\n"); - goto out; - } - if (bus_setup_intr(sc->amr_dev, sc->amr_irq, + if (bus_setup_intr(sc->amr_dev, sc->amr_res[RES_IRQ], INTR_TYPE_BIO | INTR_ENTROPY | INTR_MPSAFE, NULL, amr_pci_intr, sc, &sc->amr_intr)) { device_printf(sc->amr_dev, "can't set up interrupt\n"); @@ -511,19 +507,16 @@ /* disconnect the interrupt handler */ if (sc->amr_intr) - bus_teardown_intr(sc->amr_dev, sc->amr_irq, sc->amr_intr); - if (sc->amr_irq != NULL) - bus_release_resource(sc->amr_dev, SYS_RES_IRQ, 0, sc->amr_irq); + bus_teardown_intr(sc->amr_dev, sc->amr_res[RES_IRQ], sc->amr_intr); /* destroy the parent DMA tag */ if (sc->amr_parent_dmat) bus_dma_tag_destroy(sc->amr_parent_dmat); - /* release the register window mapping */ - if (sc->amr_reg != NULL) - bus_release_resource(sc->amr_dev, - AMR_IS_QUARTZ(sc) ? SYS_RES_MEMORY : SYS_RES_IOPORT, - PCIR_BAR(0), sc->amr_reg); + /* release resources */ + bus_release_resources(sc->amr_dev, + AMR_IS_QUARTZ(sc) ? amr_res_spec_quartz : amr_res_spec, + sc->amr_res); } /******************************************************************************** ==== //depot/projects/soc2007/loafier_busalloc/src/sys/dev/amr/amrreg.h#2 (text+ko) ==== @@ -568,10 +568,10 @@ /* * I/O primitives */ -#define AMR_QPUT_IDB(sc, val) bus_space_write_4(sc->amr_btag, sc->amr_bhandle, AMR_QIDB, val) -#define AMR_QGET_IDB(sc) bus_space_read_4 (sc->amr_btag, sc->amr_bhandle, AMR_QIDB) -#define AMR_QPUT_ODB(sc, val) bus_space_write_4(sc->amr_btag, sc->amr_bhandle, AMR_QODB, val) -#define AMR_QGET_ODB(sc) bus_space_read_4 (sc->amr_btag, sc->amr_bhandle, AMR_QODB) +#define AMR_QPUT_IDB(sc, val) bus_write_4(sc->amr_res[RES_REG], AMR_QIDB, val) +#define AMR_QGET_IDB(sc) bus_read_4(sc->amr_res[RES_REG], AMR_QIDB) +#define AMR_QPUT_ODB(sc, val) bus_write_4(sc->amr_res[RES_REG], AMR_QODB, val) +#define AMR_QGET_ODB(sc) bus_read_4(sc->amr_res[RES_REG], AMR_QODB) #ifdef AMR_BOARD_INIT #define AMR_QRESET(sc) \ @@ -626,25 +626,25 @@ /* * I/O primitives */ -#define AMR_SPUT_ISTAT(sc, val) bus_space_write_1(sc->amr_btag, sc->amr_bhandle, AMR_SINTR, val) -#define AMR_SGET_ISTAT(sc) bus_space_read_1 (sc->amr_btag, sc->amr_bhandle, AMR_SINTR) -#define AMR_SACK_INTERRUPT(sc) bus_space_write_1(sc->amr_btag, sc->amr_bhandle, AMR_SCMD, AMR_SCMD_ACKINTR) -#define AMR_SPOST_COMMAND(sc) bus_space_write_1(sc->amr_btag, sc->amr_bhandle, AMR_SCMD, AMR_SCMD_POST) -#define AMR_SGET_MBSTAT(sc) bus_space_read_1 (sc->amr_btag, sc->amr_bhandle, AMR_SMBOX_BUSY) -#define AMR_SENABLE_INTR(sc) \ - bus_space_write_1(sc->amr_btag, sc->amr_bhandle, AMR_STOGGLE, \ - bus_space_read_1(sc->amr_btag, sc->amr_bhandle, AMR_STOGGLE) | AMR_STOGL_IENABLE) -#define AMR_SDISABLE_INTR(sc) \ - bus_space_write_1(sc->amr_btag, sc->amr_bhandle, AMR_STOGGLE, \ - bus_space_read_1(sc->amr_btag, sc->amr_bhandle, AMR_STOGGLE) & ~AMR_STOGL_IENABLE) -#define AMR_SBYTE_SET(sc, reg, val) bus_space_write_1(sc->amr_btag, sc->amr_bhandle, reg, val) +#define AMR_SPUT_ISTAT(sc, val) bus_write_1(sc->amr_res[RES_REG], AMR_SINTR, val) +#define AMR_SGET_ISTAT(sc) bus_read_1(sc->amr_res[RES_REG], AMR_SINTR) +#define AMR_SACK_INTERRUPT(sc) bus_write_1(sc->amr_res[RES_REG], AMR_SCMD, AMR_SCMD_ACKINTR) +#define AMR_SPOST_COMMAND(sc) bus_write_1(sc->amr_res[RES_REG], AMR_SCMD, AMR_SCMD_POST) +#define AMR_SGET_MBSTAT(sc) bus_read_1(sc->amr_res[RES_REG], AMR_SMBOX_BUSY) +#define AMR_SENABLE_INTR(sc) \ + bus_write_1(sc->amr_res[RES_REG], AMR_STOGGLE, \ + bus_read_1(sc->amr_res[RES_REG], AMR_STOGGLE) | AMR_STOGL_IENABLE) +#define AMR_SDISABLE_INTR(sc) \ + bus_write_1(sc->amr_res[RES_REG], AMR_STOGGLE, \ + bus_read_1(sc->amr_res[RES_REG], AMR_STOGGLE) & ~AMR_STOGL_IENABLE) +#define AMR_SBYTE_SET(sc, reg, val) bus_write_1(sc->amr_res[RES_REG], reg, val) #ifdef AMR_BOARD_INIT -#define AMR_SRESET(sc) bus_space_write_1(sc->amr_btag, sc->amr_bhandle, 0, 0x80) -#define AMR_SGET_INITSTATUS(sc) bus_space_read_1 (sc->amr_btag, sc->amr_bhandle, AMR_SMBOX_ENABLE) -#define AMR_SGET_FAILDRIVE(sc) bus_space_read_1 (sc->amr_btag, sc->amr_bhandle, AMR_SMBOX_ENABLE + 1) -#define AMR_SGET_INITCHAN(sc) bus_space_read_1 (sc->amr_btag, sc->amr_bhandle, AMR_SMBOX_ENABLE + 2) -#define AMR_SGET_INITTARG(sc) bus_space_read_1 (sc->amr_btag, sc->amr_bhandle, AMR_SMBOX_ENABLE + 3) +#define AMR_SRESET(sc) bus_write_1(sc->amr_res[RES_REG], 0, 0x80) +#define AMR_SGET_INITSTATUS(sc) bus_read_1(sc->amr_res[RES_REG], AMR_SMBOX_ENABLE) +#define AMR_SGET_FAILDRIVE(sc) bus_read_1(sc->amr_res[RES_REG], AMR_SMBOX_ENABLE + 1) +#define AMR_SGET_INITCHAN(sc) bus_read_1(sc->amr_res[RES_REG], AMR_SMBOX_ENABLE + 2) +#define AMR_SGET_INITTARG(sc) bus_read_1(sc->amr_res[RES_REG], AMR_SMBOX_ENABLE + 3) #endif #endif /* _KERNEL */ ==== //depot/projects/soc2007/loafier_busalloc/src/sys/dev/amr/amrvar.h#2 (text+ko) ==== @@ -158,17 +158,20 @@ /* * Per-controller-instance data */ +enum { + RES_REG, + RES_IRQ, + RES_SZ +}; + struct amr_softc { /* bus attachments */ device_t amr_dev; - struct resource *amr_reg; /* control registers */ - bus_space_handle_t amr_bhandle; - bus_space_tag_t amr_btag; + struct resource *amr_res[RES_SZ]; /* irq & control registers */ bus_dma_tag_t amr_parent_dmat; /* parent DMA tag */ bus_dma_tag_t amr_buffer_dmat; /* data buffer DMA tag */ bus_dma_tag_t amr_buffer64_dmat; - struct resource *amr_irq; /* interrupt */ void *amr_intr; /* mailbox */
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