Date: Sun, 5 Jul 2009 06:39:37 +0000 (UTC) From: Warner Losh <imp@FreeBSD.org> To: src-committers@freebsd.org, svn-src-projects@freebsd.org Subject: svn commit: r195350 - in projects/mips/sys/mips: include mips Message-ID: <200907050639.n656dblg039562@svn.freebsd.org>
next in thread | raw e-mail | index | archive | help
Author: imp Date: Sun Jul 5 06:39:37 2009 New Revision: 195350 URL: http://svn.freebsd.org/changeset/base/195350 Log: Switch to ABI agnostic ta0-ta3. Provide defs for this in the right places. Provide n32/n64 register name defintions. This should have no effect for the O32 builds that everybody else uses, but should help make N64 builds possible (lots of other changes are needed for that). Obtained from: NetBSD (for the regdef.h changes) Modified: projects/mips/sys/mips/include/regdef.h projects/mips/sys/mips/include/regnum.h projects/mips/sys/mips/mips/exception.S projects/mips/sys/mips/mips/swtch.S Modified: projects/mips/sys/mips/include/regdef.h ============================================================================== --- projects/mips/sys/mips/include/regdef.h Sun Jul 5 06:32:10 2009 (r195349) +++ projects/mips/sys/mips/include/regdef.h Sun Jul 5 06:39:37 2009 (r195350) @@ -12,6 +12,8 @@ #ifndef _MACHINE_REGDEF_H_ #define _MACHINE_REGDEF_H_ +#include <machine/cdefs.h> /* For API selection */ + #if defined(__ASSEMBLER__) /* General purpose CPU register names */ #define zero $0 /* wired zero */ @@ -22,6 +24,16 @@ #define a1 $5 #define a2 $6 #define a3 $7 +#if defined(__mips_n32) || defined(__mips_n64) +#define a4 $8 +#define a5 $9 +#define a6 $10 +#define a7 $11 +#define t0 $12 /* Temp regs, not saved accross subroutine calls */ +#define t1 $13 +#define t2 $14 +#define t3 $15 +#else #define t0 $8 /* caller saved */ #define t1 $9 #define t2 $10 @@ -30,6 +42,7 @@ #define t5 $13 #define t6 $14 #define t7 $15 +#endif #define s0 $16 /* callee saved */ #define s1 $17 #define s2 $18 @@ -48,6 +61,26 @@ #define s8 $30 /* callee saved */ #define ra $31 /* return address */ +/* + * These are temp registers whose names can be used in either the old + * or new ABI, although they map to different physical registers. In + * the old ABI, they map to t4-t7, and in the new ABI, they map to a4-a7. + * + * Because they overlap with the last 4 arg regs in the new ABI, ta0-ta3 + * should be used only when we need more than t0-t3. + */ +#if defined(__mips_n32) || defined(__mips_n64) +#define ta0 $8 +#define ta1 $9 +#define ta2 $10 +#define ta3 $11 +#else +#define ta0 $12 +#define ta1 $13 +#define ta2 $14 +#define ta3 $15 +#endif /* __mips_n32 || __mips_n64 */ + #endif /* __ASSEMBLER__ */ #endif /* !_MACHINE_REGDEF_H_ */ Modified: projects/mips/sys/mips/include/regnum.h ============================================================================== --- projects/mips/sys/mips/include/regnum.h Sun Jul 5 06:32:10 2009 (r195349) +++ projects/mips/sys/mips/include/regnum.h Sun Jul 5 06:39:37 2009 (r195350) @@ -82,10 +82,10 @@ #define T1 9 #define T2 10 #define T3 11 -#define T4 12 -#define T5 13 -#define T6 14 -#define T7 15 +#define TA0 12 +#define TA1 13 +#define TA2 14 +#define TA3 15 #define S0 16 #define S1 17 #define S2 18 Modified: projects/mips/sys/mips/mips/exception.S ============================================================================== --- projects/mips/sys/mips/mips/exception.S Sun Jul 5 06:32:10 2009 (r195349) +++ projects/mips/sys/mips/mips/exception.S Sun Jul 5 06:39:37 2009 (r195350) @@ -272,7 +272,7 @@ SlowFault: and a0, a0, a2 ; \ mtc0 a0, COP_0_STATUS_REG #endif - + #define SAVE_CPU \ SAVE_REG(AT, AST, sp) ;\ .set at ; \ @@ -286,10 +286,10 @@ SlowFault: SAVE_REG(t1, T1, sp) ;\ SAVE_REG(t2, T2, sp) ;\ SAVE_REG(t3, T3, sp) ;\ - SAVE_REG(t4, T4, sp) ;\ - SAVE_REG(t5, T5, sp) ;\ - SAVE_REG(t6, T6, sp) ;\ - SAVE_REG(t7, T7, sp) ;\ + SAVE_REG(ta0, TA0, sp) ;\ + SAVE_REG(ta1, TA1, sp) ;\ + SAVE_REG(ta2, TA2, sp) ;\ + SAVE_REG(ta3, TA3, sp) ;\ SAVE_REG(t8, T8, sp) ;\ SAVE_REG(t9, T9, sp) ;\ SAVE_REG(gp, GP, sp) ;\ @@ -332,7 +332,7 @@ SlowFault: mtlo t0 ;\ mthi t1 ;\ _MTC0 v0, COP_0_EXC_PC ;\ - .set noat ; \ + .set noat ;\ RESTORE_REG(AT, AST, sp) ;\ RESTORE_REG(v0, V0, sp) ;\ RESTORE_REG(v1, V1, sp) ;\ @@ -344,10 +344,10 @@ SlowFault: RESTORE_REG(t1, T1, sp) ;\ RESTORE_REG(t2, T2, sp) ;\ RESTORE_REG(t3, T3, sp) ;\ - RESTORE_REG(t4, T4, sp) ;\ - RESTORE_REG(t5, T5, sp) ;\ - RESTORE_REG(t6, T6, sp) ;\ - RESTORE_REG(t7, T7, sp) ;\ + RESTORE_REG(ta0, TA0, sp) ;\ + RESTORE_REG(ta1, TA1, sp) ;\ + RESTORE_REG(ta2, TA2, sp) ;\ + RESTORE_REG(ta3, TA3, sp) ;\ RESTORE_REG(t8, T8, sp) ;\ RESTORE_REG(t9, T9, sp) ;\ RESTORE_REG(s0, S0, sp) ;\ @@ -451,11 +451,11 @@ NNON_LEAF(MipsUserGenException, STAND_FR SAVE_U_PCB_REG(t1, T1, k1) SAVE_U_PCB_REG(t2, T2, k1) SAVE_U_PCB_REG(t3, T3, k1) - SAVE_U_PCB_REG(t4, T4, k1) + SAVE_U_PCB_REG(ta0, TA0, k1) mfc0 a0, COP_0_STATUS_REG # First arg is the status reg. - SAVE_U_PCB_REG(t5, T5, k1) - SAVE_U_PCB_REG(t6, T6, k1) - SAVE_U_PCB_REG(t7, T7, k1) + SAVE_U_PCB_REG(ta1, TA1, k1) + SAVE_U_PCB_REG(ta2, TA2, k1) + SAVE_U_PCB_REG(ta3, TA3, k1) SAVE_U_PCB_REG(s0, S0, k1) mfc0 a1, COP_0_CAUSE_REG # Second arg is the cause reg. SAVE_U_PCB_REG(s1, S1, k1) @@ -548,10 +548,10 @@ NNON_LEAF(MipsUserGenException, STAND_FR RESTORE_U_PCB_REG(t1, T1, k1) RESTORE_U_PCB_REG(t2, T2, k1) RESTORE_U_PCB_REG(t3, T3, k1) - RESTORE_U_PCB_REG(t4, T4, k1) - RESTORE_U_PCB_REG(t5, T5, k1) - RESTORE_U_PCB_REG(t6, T6, k1) - RESTORE_U_PCB_REG(t7, T7, k1) + RESTORE_U_PCB_REG(ta0, TA0, k1) + RESTORE_U_PCB_REG(ta1, TA1, k1) + RESTORE_U_PCB_REG(ta2, TA2, k1) + RESTORE_U_PCB_REG(ta3, TA3, k1) RESTORE_U_PCB_REG(s0, S0, k1) RESTORE_U_PCB_REG(s1, S1, k1) RESTORE_U_PCB_REG(s2, S2, k1) @@ -684,10 +684,10 @@ NNON_LEAF(MipsUserIntr, STAND_FRAME_SIZE SAVE_U_PCB_REG(t1, T1, k1) SAVE_U_PCB_REG(t2, T2, k1) SAVE_U_PCB_REG(t3, T3, k1) - SAVE_U_PCB_REG(t4, T4, k1) - SAVE_U_PCB_REG(t5, T5, k1) - SAVE_U_PCB_REG(t6, T6, k1) - SAVE_U_PCB_REG(t7, T7, k1) + SAVE_U_PCB_REG(ta0, TA0, k1) + SAVE_U_PCB_REG(ta1, TA1, k1) + SAVE_U_PCB_REG(ta2, TA2, k1) + SAVE_U_PCB_REG(ta3, TA3, k1) SAVE_U_PCB_REG(t8, T8, k1) SAVE_U_PCB_REG(t9, T9, k1) SAVE_U_PCB_REG(gp, GP, k1) @@ -790,10 +790,10 @@ NNON_LEAF(MipsUserIntr, STAND_FRAME_SIZE RESTORE_U_PCB_REG(t1, T1, k1) RESTORE_U_PCB_REG(t2, T2, k1) RESTORE_U_PCB_REG(t3, T3, k1) - RESTORE_U_PCB_REG(t4, T4, k1) - RESTORE_U_PCB_REG(t5, T5, k1) - RESTORE_U_PCB_REG(t6, T6, k1) - RESTORE_U_PCB_REG(t7, T7, k1) + RESTORE_U_PCB_REG(ta0, TA0, k1) + RESTORE_U_PCB_REG(ta1, TA1, k1) + RESTORE_U_PCB_REG(ta2, TA2, k1) + RESTORE_U_PCB_REG(ta3, TA3, k1) RESTORE_U_PCB_REG(t8, T8, k1) RESTORE_U_PCB_REG(t9, T9, k1) RESTORE_U_PCB_REG(gp, GP, k1) Modified: projects/mips/sys/mips/mips/swtch.S ============================================================================== --- projects/mips/sys/mips/mips/swtch.S Sun Jul 5 06:32:10 2009 (r195349) +++ projects/mips/sys/mips/mips/swtch.S Sun Jul 5 06:39:37 2009 (r195350) @@ -203,10 +203,10 @@ LEAF(fork_trampoline) RESTORE_U_PCB_REG(t1, T1, k1) RESTORE_U_PCB_REG(t2, T2, k1) RESTORE_U_PCB_REG(t3, T3, k1) - RESTORE_U_PCB_REG(t4, T4, k1) - RESTORE_U_PCB_REG(t5, T5, k1) - RESTORE_U_PCB_REG(t6, T6, k1) - RESTORE_U_PCB_REG(t7, T7, k1) + RESTORE_U_PCB_REG(ta0, TA0, k1) + RESTORE_U_PCB_REG(ta1, TA1, k1) + RESTORE_U_PCB_REG(ta2, TA2, k1) + RESTORE_U_PCB_REG(ta3, TA3, k1) RESTORE_U_PCB_REG(s0, S0, k1) RESTORE_U_PCB_REG(s1, S1, k1) RESTORE_U_PCB_REG(s2, S2, k1)
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?200907050639.n656dblg039562>