Date: Wed, 11 Sep 2024 10:42:00 GMT From: Andrew Turner <andrew@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Subject: git: 769eeb093254 - main - arm64: Trap floating-point registers with VHE Message-ID: <202409111042.48BAg0wG007537@gitrepo.freebsd.org>
index | next in thread | raw e-mail
The branch main has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=769eeb09325419ccbc7fbd1c22afc9b1e1e191f3 commit 769eeb09325419ccbc7fbd1c22afc9b1e1e191f3 Author: Andrew Turner <andrew@FreeBSD.org> AuthorDate: 2024-09-02 15:36:13 +0000 Commit: Andrew Turner <andrew@FreeBSD.org> CommitDate: 2024-09-11 10:25:08 +0000 arm64: Trap floating-point registers with VHE When VHE is enabled we disabled trapping floating-point instructions to EL2 in locore.S. As the kernel is running in EL2 then vfp.c will manage enabling floating-point instructions as needed. Sponsored by: Arm Ltd --- sys/arm64/arm64/locore.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/arm64/arm64/locore.S b/sys/arm64/arm64/locore.S index 7c60a2c5bf0a..f9a179931d7d 100644 --- a/sys/arm64/arm64/locore.S +++ b/sys/arm64/arm64/locore.S @@ -377,7 +377,7 @@ LENTRY(enter_kernel_el) isb msr SCTLR_EL12_REG, x2 - ldr x2, =(CPTR_FPEN) + mov x2, xzr /* CPTR_EL2 is managed by vfp.c */ ldr x3, =(CNTHCTL_E2H_EL1PCTEN | CNTHCTL_E2H_EL1PTEN) ldr x5, =(PSR_DAIF | PSR_M_EL2h) b .Ldone_vhehelp
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?202409111042.48BAg0wG007537>