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Date:      Thu, 31 Aug 2006 05:26:20 GMT
From:      Matt Jacob <mjacob@FreeBSD.org>
To:        Perforce Change Reviews <perforce@freebsd.org>
Subject:   PERFORCE change 105385 for review
Message-ID:  <200608310526.k7V5QKS9091389@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=105385

Change 105385 by mjacob@newisp on 2006/08/31 05:25:43

	Fix crocked 2400 register offsets for ICR && ISR.
	Interrupts now work. Yay.

Affected files ...

.. //depot/projects/newisp/dev/isp/isp_pci.c#6 edit
.. //depot/projects/newisp/dev/isp/ispreg.h#4 edit

Differences ...

==== //depot/projects/newisp/dev/isp/isp_pci.c#6 (text+ko) ====

@@ -1186,7 +1186,6 @@
 	ispsoftc_t *isp = arg;
 	uint32_t isr, sema, mbox;
 
-if (IS_24XX(isp)) printf("#");
 	ISP_LOCK(isp);
 	isp->isp_intcnt++;
 	if (ISP_READ_ISR(isp, &isr, &sema, &mbox) == 0) {
@@ -1510,11 +1509,11 @@
 
 
 	switch (regoff) {
-	case BIU_SEMA:
-		rv = 0;
-		break;
 	case BIU2400_FLASH_ADDR:
 	case BIU2400_FLASH_DATA:
+	case BIU2400_ICR:
+	case BIU2400_ISR:
+	case BIU2400_CSR:
 	case BIU2400_REQINP:
 	case BIU2400_REQOUTP:
 	case BIU2400_RSPINP:
@@ -1523,7 +1522,6 @@
 	case BIU2400_PRI_RSPINP:
 	case BIU2400_ATIO_RSPINP:
 	case BIU2400_ATIO_REQINP:
-	case BIU2400_CSR:
 	case BIU2400_HCCR:
 	case BIU2400_GPIOD:
 	case BIU2400_GPIOE:
@@ -1531,7 +1529,7 @@
 		rv = BXR4(pcs, IspVirt2Off(pcs, regoff));
 		break;
 	case BIU2400_R2HSTSLO:
-		rv = BXR4(pcs, IspVirt2Off(pcs, regoff)) & 0xffff;
+		rv = BXR4(pcs, IspVirt2Off(pcs, regoff));
 		break;
 	case BIU2400_R2HSTSHI:
 		rv = BXR4(pcs, IspVirt2Off(pcs, regoff)) >> 16;
@@ -1575,10 +1573,11 @@
 	}
 
 	switch (regoff) {
-	case BIU_SEMA:
-		break;
 	case BIU2400_FLASH_ADDR:
 	case BIU2400_FLASH_DATA:
+	case BIU2400_ICR:
+	case BIU2400_ISR:
+	case BIU2400_CSR:
 	case BIU2400_REQINP:
 	case BIU2400_REQOUTP:
 	case BIU2400_RSPINP:
@@ -1587,7 +1586,6 @@
 	case BIU2400_PRI_RSPINP:
 	case BIU2400_ATIO_RSPINP:
 	case BIU2400_ATIO_REQINP:
-	case BIU2400_CSR:
 	case BIU2400_HCCR:
 	case BIU2400_GPIOD:
 	case BIU2400_GPIOE:

==== //depot/projects/newisp/dev/isp/ispreg.h#4 (text+ko) ====

@@ -228,22 +228,6 @@
 
 #define	BIU2100_IMASK	(BIU2100_ICR_ENA_RISC_INT|BIU2100_ICR_ENABLE_ALL_INTS)
 
-#define	INTS_ENABLED(isp)						\
- ((IS_SCSI(isp))?  							\
-  (ISP_READ(isp, BIU_ICR) & BIU_IMASK) :				\
-   (IS_24XX(isp)? (ISP_READ(isp, BIU2400_ICR) & BIU2400_IMASK) :	\
-   (ISP_READ(isp, BIU_ICR) & BIU2100_IMASK)))
-
-#define	ENABLE_INTS(isp)						\
- (IS_SCSI(isp) ?  							\
-   ISP_WRITE(isp, BIU_ICR, BIU_IMASK) :					\
-   (IS_24XX(isp) ?							\
-    (ISP_WRITE(isp, BIU2400_ICR, BIU2400_IMASK)) :			\
-    (ISP_WRITE(isp, BIU_ICR, BIU2100_IMASK))))
-
-#define	DISABLE_INTS(isp)		\
- IS_24XX(isp)? ISP_WRITE(isp, BIU2400_ICR, 0) : ISP_WRITE(isp, BIU_ICR, 0)
-
 /* BUS STATUS REGISTER */
 #define	BIU_ISR_DMA_INT			0x0020	/* DMA interrupt pending */
 #define	BIU_ISR_CDMA_INT		0x0010	/* CDMA interrupt pending */
@@ -777,6 +761,25 @@
 #define	PCI_HCCR_BIOS			0x0001	/*  W : BIOS enable */
 
 /*
+ * Defines for Interrupts
+ */
+#define	INTS_ENABLED(isp)						\
+ ((IS_SCSI(isp))?  							\
+  (ISP_READ(isp, BIU_ICR) & BIU_IMASK) :				\
+   (IS_24XX(isp)? (ISP_READ(isp, BIU2400_ICR) & BIU2400_IMASK) :	\
+   (ISP_READ(isp, BIU_ICR) & BIU2100_IMASK)))
+
+#define	ENABLE_INTS(isp)						\
+ (IS_SCSI(isp) ?  							\
+   ISP_WRITE(isp, BIU_ICR, BIU_IMASK) :					\
+   (IS_24XX(isp) ?							\
+    (ISP_WRITE(isp, BIU2400_ICR, BIU2400_IMASK)) :			\
+    (ISP_WRITE(isp, BIU_ICR, BIU2100_IMASK))))
+
+#define	DISABLE_INTS(isp)		\
+ IS_24XX(isp)? ISP_WRITE(isp, BIU2400_ICR, 0) : ISP_WRITE(isp, BIU_ICR, 0)
+
+/*
  * NVRAM Definitions (PCI cards only)
  */
 
@@ -825,9 +828,9 @@
 #define	ISP_NVRAM_FAST_MTTR_ENABLE(c)		ISPBSMX(c, 22, 0, 0x01)
 
 #define	ISP_NVRAM_TARGOFF			28
-#define	ISP_NVARM_TARGSIZE			6
+#define	ISP_NVRAM_TARGSIZE			6
 #define	_IxT(tgt, tidx)			\
-	(ISP_NVRAM_TARGOFF + (ISP_NVARM_TARGSIZE * (tgt)) + (tidx))
+	(ISP_NVRAM_TARGOFF + (ISP_NVRAM_TARGSIZE * (tgt)) + (tidx))
 #define	ISP_NVRAM_TGT_RENEG(c, t)		ISPBSMX(c, _IxT(t, 0), 0, 0x01)
 #define	ISP_NVRAM_TGT_QFRZ(c, t)		ISPBSMX(c, _IxT(t, 0), 1, 0x01)
 #define	ISP_NVRAM_TGT_ARQ(c, t)			ISPBSMX(c, _IxT(t, 0), 2, 0x01)

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