Date: Thu, 4 Dec 2008 19:08:30 GMT From: Sam Leffler <sam@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 154062 for review Message-ID: <200812041908.mB4J8U1r015763@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=154062 Change 154062 by sam@sam_ebb on 2008/12/04 19:07:37 o explicitly map the 435's MCU to the same va as the 425's o add mappings for the builtin usb controllers on the 435 o make style consistent Affected files ... .. //depot/projects/vap/sys/arm/xscale/ixp425/avila_machdep.c#11 edit Differences ... ==== //depot/projects/vap/sys/arm/xscale/ixp425/avila_machdep.c#11 (text+ko) ==== @@ -205,7 +205,7 @@ VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, }, /* DDRII Controller NB: mapped same place as IXP425 */ - { IXP435_MCU_VBASE, IXP435_MCU_HWBASE, IXP435_MCU_SIZE, + { IXP425_MCU_VBASE, IXP435_MCU_HWBASE, IXP425_MCU_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, }, /* PCI Memory Space */ @@ -230,6 +230,13 @@ { IXP435_MAC_A_VBASE, IXP435_MAC_A_HWBASE, IXP435_MAC_A_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, }, + /* USB1 Memory Space */ + { IXP435_USB1_VBASE, IXP435_USB1_HWBASE, IXP435_USB1_SIZE, + VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, }, + /* USB2 Memory Space */ + { IXP435_USB2_VBASE, IXP435_USB2_HWBASE, IXP435_USB2_SIZE, + VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, }, + { 0 } }; @@ -300,7 +307,7 @@ freemem_pt = freemempos; /* base of allocated pt's */ /* - * Re-align allocation boundary so we can map there area + * Re-align allocation boundary so we can map the area * write-back instead of write-through for the stacks and * related structures allocated below. */ @@ -346,11 +353,11 @@ pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00100000 - 1), &kernel_pt_table[KERNEL_PT_SYS]); pmap_link_l2pt(l1pagetable, IXP425_IO_VBASE, - &kernel_pt_table[KERNEL_PT_IO]); + &kernel_pt_table[KERNEL_PT_IO]); pmap_link_l2pt(l1pagetable, IXP425_MCU_VBASE, - &kernel_pt_table[KERNEL_PT_IO + 1]); + &kernel_pt_table[KERNEL_PT_IO + 1]); pmap_link_l2pt(l1pagetable, IXP425_PCI_MEM_VBASE, - &kernel_pt_table[KERNEL_PT_IO + 2]); + &kernel_pt_table[KERNEL_PT_IO + 2]); pmap_link_l2pt(l1pagetable, KERNBASE, &kernel_pt_table[KERNEL_PT_BEFOREKERN]); pmap_map_chunk(l1pagetable, KERNBASE, PHYSADDR, 0x100000,help
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