Date: Fri, 26 Jul 2013 06:24:33 +0000 (UTC) From: Hans Petter Selasky <hselasky@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-9@freebsd.org Subject: svn commit: r253665 - stable/9/sys/dev/usb/controller Message-ID: <201307260624.r6Q6OX6Z009831@svn.freebsd.org>
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Author: hselasky Date: Fri Jul 26 06:24:33 2013 New Revision: 253665 URL: http://svnweb.freebsd.org/changeset/base/253665 Log: MFC r253532: Fix an XHCI regression: The Block Event Interrupts, BEI, feature does not work like expected with the Renesas XHCI chipsets. Revert feature. While at it correct the TD SIZE computation in case of Zero Length Packet, ZLP, in the end of a multi frame USB transfer. PR: usb/180726 Approved by: re, hrs Modified: stable/9/sys/dev/usb/controller/xhci.c Directory Properties: stable/9/sys/ (props changed) stable/9/sys/dev/ (props changed) Modified: stable/9/sys/dev/usb/controller/xhci.c ============================================================================== --- stable/9/sys/dev/usb/controller/xhci.c Fri Jul 26 06:23:57 2013 (r253664) +++ stable/9/sys/dev/usb/controller/xhci.c Fri Jul 26 06:24:33 2013 (r253665) @@ -1654,7 +1654,6 @@ restart: /* fill out buffer pointers */ if (average == 0) { - npkt = 0; memset(&buf_res, 0, sizeof(buf_res)); } else { usbd_get_page(temp->pc, temp->offset + @@ -1669,15 +1668,17 @@ restart: buf_res.length = XHCI_TD_PAGE_SIZE; npkt_off += buf_res.length; - - /* setup npkt */ - npkt = (len_old - npkt_off + temp->max_packet_size - 1) / - temp->max_packet_size; - - if (npkt > 31) - npkt = 31; } + /* setup npkt */ + npkt = (len_old - npkt_off + temp->max_packet_size - 1) / + temp->max_packet_size; + + if (npkt == 0) + npkt = 1; + else if (npkt > 31) + npkt = 31; + /* fill out TRB's */ td->td_trb[x].qwTrb0 = htole64((uint64_t)buf_res.physaddr); @@ -1691,9 +1692,7 @@ restart: switch (temp->trb_type) { case XHCI_TRB_TYPE_ISOCH: - /* BEI: Interrupts are inhibited until EOT */ dword = XHCI_TRB_3_CHAIN_BIT | XHCI_TRB_3_CYCLE_BIT | - XHCI_TRB_3_BEI_BIT | XHCI_TRB_3_TBC_SET(temp->tbc) | XHCI_TRB_3_TLBPC_SET(temp->tlbpc); if (td != td_first) { @@ -1728,10 +1727,8 @@ restart: dword |= XHCI_TRB_3_DIR_IN; break; default: /* XHCI_TRB_TYPE_NORMAL */ - /* BEI: Interrupts are inhibited until EOT */ dword = XHCI_TRB_3_CHAIN_BIT | XHCI_TRB_3_CYCLE_BIT | XHCI_TRB_3_TYPE_SET(XHCI_TRB_TYPE_NORMAL) | - XHCI_TRB_3_BEI_BIT | XHCI_TRB_3_TBC_SET(temp->tbc) | XHCI_TRB_3_TLBPC_SET(temp->tlbpc); if (temp->direction == UE_DIR_IN) @@ -1810,6 +1807,7 @@ restart: usb_pc_cpu_flush(td_first->page_cache); } + /* clear TD SIZE to zero, hence this is the last TRB */ /* remove chain bit because this is the last TRB in the chain */ td->td_trb[td->ntrb - 1].dwTrb2 &= ~htole32(XHCI_TRB_2_TDSZ_SET(15)); td->td_trb[td->ntrb - 1].dwTrb3 &= ~htole32(XHCI_TRB_3_CHAIN_BIT);
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