Date: Thu, 16 Feb 2017 21:57:08 +0000 (UTC) From: Warner Losh <imp@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r313834 - in head: share/man/man4 sys/conf sys/dev/pdq Message-ID: <201702162157.v1GLv8XE043713@repo.freebsd.org>
next in thread | raw e-mail | index | archive | help
Author: imp Date: Thu Feb 16 21:57:08 2017 New Revision: 313834 URL: https://svnweb.freebsd.org/changeset/base/313834 Log: Remove EISA attachment (fea) from pdq driver. Remove vestiges of TurboChannel and Q-Bus support while I'm here. Remove obsolete diagnostics from man page. Deleted: head/sys/dev/pdq/if_fea.c Modified: head/share/man/man4/Makefile head/share/man/man4/fpa.4 head/sys/conf/NOTES head/sys/conf/files head/sys/dev/pdq/pdq.c head/sys/dev/pdq/pdq_freebsd.h head/sys/dev/pdq/pdq_ifsubr.c head/sys/dev/pdq/pdqreg.h head/sys/dev/pdq/pdqvar.h Modified: head/share/man/man4/Makefile ============================================================================== --- head/share/man/man4/Makefile Thu Feb 16 21:57:02 2017 (r313833) +++ head/share/man/man4/Makefile Thu Feb 16 21:57:08 2017 (r313834) @@ -634,7 +634,6 @@ MLINKS+=fd.4 stderr.4 \ fd.4 stdout.4 MLINKS+=fdt.4 FDT.4 MLINKS+=firewire.4 ieee1394.4 -MLINKS+=fpa.4 fea.4 MLINKS+=fwe.4 if_fwe.4 MLINKS+=fwip.4 if_fwip.4 MLINKS+=fxp.4 if_fxp.4 Modified: head/share/man/man4/fpa.4 ============================================================================== --- head/share/man/man4/fpa.4 Thu Feb 16 21:57:02 2017 (r313833) +++ head/share/man/man4/fpa.4 Thu Feb 16 21:57:08 2017 (r313834) @@ -4,16 +4,14 @@ .\" .\" $FreeBSD$ .\" -.Dd March 13, 1995 +.Dd February 15, 2017 .Dt FPA 4 .Os .Sh NAME -.Nm fpa , -.Nm fea +.Nm fpa .Nd device drivers for DEC FDDI controllers .Sh SYNOPSIS .Cd "device fpa" -.Cd "device fea" .Pp .Fx only: @@ -21,25 +19,9 @@ only: .Sh DESCRIPTION The .Nm -and -.Nm fea -device drivers provide support for the DEC DEFPA PCI FDDI Controller and -the DEC DEFEA EISA FDDI Controller, respectively. -All variants of either +device driver provide support for the DEC DEFPA PCI FDDI Controller. +All variants of the controller are supported including the DAS and SAS configurations. -.Sh DIAGNOSTICS -.Bl -diag -.It "fea%d: error: desired IRQ of %d does not match device's actual IRQ (%d)" -The device probe detected that the DEFEA board is configured for a different -interrupt than the one specified in the kernel configuration file. -.It "fea%d: error: memory not enabled! ECU reconfiguration required" -The device probe found that no device memory had been configured on the -DEFEA. -Although the DEFEA can be configured with no device memory, this driver -requires a minimum of 1K device memory to be set up. -The ECU (EISA Configuration -Utility) will need to be run to change the settings. -.El .Sh SEE ALSO .Xr arp 4 , .Xr netintro 4 , @@ -47,9 +29,7 @@ Utility) will need to be run to change t .Sh AUTHORS The .Nm -and -.Nm fea -device drivers and this manual page were written by +device driver and this manual page were written by .An Matt Thomas . .Sh CAVEATS Normally, the device driver will not enable the reception of SMT frames. Modified: head/sys/conf/NOTES ============================================================================== --- head/sys/conf/NOTES Thu Feb 16 21:57:02 2017 (r313833) +++ head/sys/conf/NOTES Thu Feb 16 21:57:08 2017 (r313834) @@ -1974,7 +1974,6 @@ device xmphy # XaQti XMAC II # ex: Intel EtherExpress Pro/10 and other i82595-based adapters, # Olicom Ethernet PC Card devices. # fe: Fujitsu MB86960A/MB86965A Ethernet -# fea: DEC DEFEA EISA FDDI adapter # fpa: Support for the Digital DEFPA PCI FDDI. `device fddi' is also needed. # fxp: Intel EtherExpress Pro/100B # (hint of prefer_iomap can be done to prefer I/O instead of Mem mapping) @@ -2087,7 +2086,6 @@ device ex device fe hint.fe.0.at="isa" hint.fe.0.port="0x300" -device fea device sn hint.sn.0.at="isa" hint.sn.0.port="0x300" Modified: head/sys/conf/files ============================================================================== --- head/sys/conf/files Thu Feb 16 21:57:02 2017 (r313833) +++ head/sys/conf/files Thu Feb 16 21:57:08 2017 (r313834) @@ -2409,10 +2409,9 @@ dev/pci/pcib_if.m standard dev/pci/pcib_support.c standard dev/pci/vga_pci.c optional pci dev/pcn/if_pcn.c optional pcn pci -dev/pdq/if_fea.c optional fea eisa dev/pdq/if_fpa.c optional fpa pci -dev/pdq/pdq.c optional nowerror fea eisa | fpa pci -dev/pdq/pdq_ifsubr.c optional nowerror fea eisa | fpa pci +dev/pdq/pdq.c optional nowerror fpa pci +dev/pdq/pdq_ifsubr.c optional nowerror fpa pci dev/pms/freebsd/driver/ini/src/agtiapi.c optional pmspcv \ compile-with "${NORMAL_C} -Wunused-variable -Woverflow -Wparentheses -w" dev/pms/RefTisa/sallsdk/spc/sadisc.c optional pmspcv \ Modified: head/sys/dev/pdq/pdq.c ============================================================================== --- head/sys/dev/pdq/pdq.c Thu Feb 16 21:57:02 2017 (r313833) +++ head/sys/dev/pdq/pdq.c Thu Feb 16 21:57:08 2017 (r313834) @@ -163,10 +163,6 @@ static const char * const * const pdq_pm static const char * const pdq_descriptions[] = { "DEFPA PCI", - "DEFEA EISA", - "DEFTA TC", - "DEFAA Futurebus", - "DEFQA Q-bus", }; static void @@ -1088,8 +1084,7 @@ pdq_hwreset( state = PDQ_PSTS_ADAPTER_STATE(PDQ_CSR_READ(csrs, csr_port_status)); if (state == PDQS_DMA_UNAVAILABLE) return; - PDQ_CSR_WRITE(csrs, csr_port_data_a, - (state == PDQS_HALTED && pdq->pdq_type != PDQ_DEFTA) ? 0 : PDQ_PRESET_SKIP_SELFTEST); + PDQ_CSR_WRITE(csrs, csr_port_data_a, PDQ_PRESET_SKIP_SELFTEST); PDQ_CSR_WRITE(csrs, csr_port_reset, 1); PDQ_OS_USEC_DELAY(100); PDQ_CSR_WRITE(csrs, csr_port_reset, 0); @@ -1164,13 +1159,11 @@ pdq_stop( pdq_read_fwrev(&pdq->pdq_csrs, &pdq->pdq_fwrev); pdq->pdq_chip_rev = pdq_read_chiprev(&pdq->pdq_csrs); - if (pdq->pdq_type == PDQ_DEFPA) { - /* - * Disable interrupts and DMA. - */ - PDQ_CSR_WRITE(&pdq->pdq_pci_csrs, csr_pfi_mode_control, 0); - PDQ_CSR_WRITE(&pdq->pdq_pci_csrs, csr_pfi_status, 0x10); - } + /* + * Disable interrupts and DMA. + */ + PDQ_CSR_WRITE(&pdq->pdq_pci_csrs, csr_pfi_mode_control, 0); + PDQ_CSR_WRITE(&pdq->pdq_pci_csrs, csr_pfi_status, 0x10); /* * Flush all the databuf queues. @@ -1229,27 +1222,21 @@ pdq_stop( * Allow the DEFPA to do DMA. Then program the physical * addresses of the consumer and descriptor blocks. */ - if (pdq->pdq_type == PDQ_DEFPA) { #ifdef PDQTEST - PDQ_CSR_WRITE(&pdq->pdq_pci_csrs, csr_pfi_mode_control, - PDQ_PFI_MODE_DMA_ENABLE); + PDQ_CSR_WRITE(&pdq->pdq_pci_csrs, csr_pfi_mode_control, + PDQ_PFI_MODE_DMA_ENABLE); #else - PDQ_CSR_WRITE(&pdq->pdq_pci_csrs, csr_pfi_mode_control, - PDQ_PFI_MODE_DMA_ENABLE - /*|PDQ_PFI_MODE_PFI_PCI_INTR*/|PDQ_PFI_MODE_PDQ_PCI_INTR); + PDQ_CSR_WRITE(&pdq->pdq_pci_csrs, csr_pfi_mode_control, + PDQ_PFI_MODE_DMA_ENABLE + /*|PDQ_PFI_MODE_PFI_PCI_INTR*/|PDQ_PFI_MODE_PDQ_PCI_INTR); #endif - } /* * Make sure the unsolicited queue has events ... */ pdq_process_unsolicited_events(pdq); - if ((pdq->pdq_type == PDQ_DEFEA && pdq->pdq_chip_rev == PDQ_CHIP_REV_E) - || pdq->pdq_type == PDQ_DEFTA) - PDQ_CSR_WRITE(csrs, csr_port_data_b, PDQ_DMA_BURST_16LW); - else - PDQ_CSR_WRITE(csrs, csr_port_data_b, PDQ_DMA_BURST_8LW); + PDQ_CSR_WRITE(csrs, csr_port_data_b, PDQ_DMA_BURST_8LW); PDQ_CSR_WRITE(csrs, csr_port_data_a, PDQ_SUB_CMD_DMA_BURST_SIZE_SET); pdq_do_port_control(csrs, PDQ_PCTL_SUB_CMD); @@ -1408,8 +1395,7 @@ pdq_interrupt( pdq_uint32_t data; int progress = 0; - if (pdq->pdq_type == PDQ_DEFPA) - PDQ_CSR_WRITE(&pdq->pdq_pci_csrs, csr_pfi_status, 0x18); + PDQ_CSR_WRITE(&pdq->pdq_pci_csrs, csr_pfi_status, 0x18); while ((data = PDQ_CSR_READ(csrs, csr_port_status)) & PDQ_PSTS_INTR_PENDING) { progress = 1; @@ -1454,7 +1440,7 @@ pdq_interrupt( pdq_halt_code_t halt_code = PDQ_PSTS_HALT_ID(PDQ_CSR_READ(csrs, csr_port_status)); printf(": halt code = %d (%s)\n", halt_code, pdq_halt_codes[halt_code]); - if (halt_code == PDQH_DMA_ERROR && pdq->pdq_type == PDQ_DEFPA) { + if (halt_code == PDQH_DMA_ERROR) { PDQ_PRINTF(("\tPFI status = 0x%x, Host 0 Fatal Interrupt = 0x%x\n", PDQ_CSR_READ(&pdq->pdq_pci_csrs, csr_pfi_status), data & PDQ_HOST_INT_FATAL_ERROR)); @@ -1503,8 +1489,7 @@ pdq_interrupt( PDQ_CSR_WRITE(csrs, csr_host_int_type_0, PDQ_HOST_INT_XMT_DATA_FLUSH); } } - if (pdq->pdq_type == PDQ_DEFPA) - PDQ_CSR_WRITE(&pdq->pdq_pci_csrs, csr_pfi_status, 0x18); + PDQ_CSR_WRITE(&pdq->pdq_pci_csrs, csr_pfi_status, 0x18); } return progress; } @@ -1639,9 +1624,8 @@ pdq_initialize( * Initialize the CSR references. * the DEFAA (FutureBus+) skips a longword between registers */ - pdq_init_csrs(&pdq->pdq_csrs, bus, csr_base, pdq->pdq_type == PDQ_DEFAA ? 2 : 1); - if (pdq->pdq_type == PDQ_DEFPA) - pdq_init_pci_csrs(&pdq->pdq_pci_csrs, bus, csr_base, 1); + pdq_init_csrs(&pdq->pdq_csrs, bus, csr_base, 1); + pdq_init_pci_csrs(&pdq->pdq_pci_csrs, bus, csr_base, 1); PDQ_PRINTF(("PDQ CSRs: BASE = " PDQ_OS_CSR_FMT "\n", pdq->pdq_csrs.csr_base)); PDQ_PRINTF((" Port Reset = " PDQ_OS_CSR_FMT " [0x%08x]\n", @@ -1774,7 +1758,7 @@ pdq_initialize( if (state == PDQS_HALTED) { pdq_halt_code_t halt_code = PDQ_PSTS_HALT_ID(PDQ_CSR_READ(&pdq->pdq_csrs, csr_port_status)); printf("Halt code = %d (%s)\n", halt_code, pdq_halt_codes[halt_code]); - if (halt_code == PDQH_DMA_ERROR && pdq->pdq_type == PDQ_DEFPA) + if (halt_code == PDQH_DMA_ERROR) PDQ_PRINTF(("PFI status = 0x%x, Host 0 Fatal Interrupt = 0x%x\n", PDQ_CSR_READ(&pdq->pdq_pci_csrs, csr_pfi_status), PDQ_CSR_READ(&pdq->pdq_csrs, csr_host_int_type_0) & PDQ_HOST_INT_FATAL_ERROR)); Modified: head/sys/dev/pdq/pdq_freebsd.h ============================================================================== --- head/sys/dev/pdq/pdq_freebsd.h Thu Feb 16 21:57:02 2017 (r313833) +++ head/sys/dev/pdq/pdq_freebsd.h Thu Feb 16 21:57:08 2017 (r313834) @@ -86,10 +86,6 @@ extern devclass_t pdq_devclass; enum _pdq_type_t { PDQ_DEFPA, /* PCI-bus */ - PDQ_DEFEA, /* EISA-bus */ - PDQ_DEFTA, /* TurboChannel */ - PDQ_DEFAA, /* FutureBus+ */ - PDQ_DEFQA /* Q-bus */ }; #define sc_ifmedia ifmedia Modified: head/sys/dev/pdq/pdq_ifsubr.c ============================================================================== --- head/sys/dev/pdq/pdq_ifsubr.c Thu Feb 16 21:57:02 2017 (r313833) +++ head/sys/dev/pdq/pdq_ifsubr.c Thu Feb 16 21:57:08 2017 (r313834) @@ -459,6 +459,8 @@ pdq_ifattach(pdq_softc_t *sc, const pdq_ { struct ifnet *ifp; + KASSERT(type == PDQ_DEFPA, ("We only support PCI attachment.")); + ifp = PDQ_IFNET(sc) = if_alloc(IFT_FDDI); if (ifp == NULL) { device_printf(sc->dev, "can not if_alloc()\n"); Modified: head/sys/dev/pdq/pdqreg.h ============================================================================== --- head/sys/dev/pdq/pdqreg.h Thu Feb 16 21:57:02 2017 (r313833) +++ head/sys/dev/pdq/pdqreg.h Thu Feb 16 21:57:08 2017 (r313834) @@ -127,52 +127,6 @@ struct _pdq_pci_csrs_t { #define PDQ_PFI_STATUS_PDQ_INTR 0x10 /* PDQ Int received */ #define PDQ_PFI_STATUS_DMA_ABORT 0x08 /* PDQ DMA Abort asserted */ -#define PDQ_EISA_BURST_HOLDOFF 0x0040 -#define PDQ_EISA_SLOT_ID 0x0C80 -#define PDQ_EISA_SLOT_CTRL 0x0C84 -#define PDQ_EISA_MEM_ADD_CMP_0 0x0C85 -#define PDQ_EISA_MEM_ADD_CMP_1 0x0C86 -#define PDQ_EISA_MEM_ADD_CMP_2 0x0C87 -#define PDQ_EISA_MEM_ADD_HI_CMP_0 0x0C88 -#define PDQ_EISA_MEM_ADD_HI_CMP_1 0x0C89 -#define PDQ_EISA_MEM_ADD_HI_CMP_2 0x0C8A -#define PDQ_EISA_MEM_ADD_MASK_0 0x0C8B -#define PDQ_EISA_MEM_ADD_MASK_1 0x0C8C -#define PDQ_EISA_MEM_ADD_MASK_2 0x0C8D -#define PDQ_EISA_MEM_ADD_LO_CMP_0 0x0C8E -#define PDQ_EISA_MEM_ADD_LO_CMP_1 0x0C8F -#define PDQ_EISA_MEM_ADD_LO_CMP_2 0x0C90 -#define PDQ_EISA_IO_CMP_0_0 0x0C91 -#define PDQ_EISA_IO_CMP_0_1 0x0C92 -#define PDQ_EISA_IO_CMP_1_0 0x0C93 -#define PDQ_EISA_IO_CMP_1_1 0x0C94 -#define PDQ_EISA_IO_CMP_2_0 0x0C95 -#define PDQ_EISA_IO_CMP_2_1 0x0C96 -#define PDQ_EISA_IO_CMP_3_0 0x0C97 -#define PDQ_EISA_IO_CMP_3_1 0x0C98 -#define PDQ_EISA_IO_ADD_MASK_0_0 0x0C99 -#define PDQ_EISA_IO_ADD_MASK_0_1 0x0C9A -#define PDQ_EISA_IO_ADD_MASK_1_0 0x0C9B -#define PDQ_EISA_IO_ADD_MASK_1_1 0x0C9C -#define PDQ_EISA_IO_ADD_MASK_2_0 0x0C9D -#define PDQ_EISA_IO_ADD_MASK_2_1 0x0C9E -#define PDQ_EISA_IO_ADD_MASK_3_0 0x0C9F -#define PDQ_EISA_IO_ADD_MASK_3_1 0x0CA0 -#define PDQ_EISA_MOD_CONFIG_1 0x0CA1 -#define PDQ_EISA_MOD_CONFIG_2 0x0CA2 -#define PDQ_EISA_MOD_CONFIG_3 0x0CA3 -#define PDQ_EISA_MOD_CONFIG_4 0x0CA4 -#define PDQ_EISA_MOD_CONFIG_5 0x0CA5 -#define PDQ_EISA_MOD_CONFIG_6 0x0CA6 -#define PDQ_EISA_MOD_CONFIG_7 0x0CA7 -#define PDQ_EISA_DIP_SWITCH 0x0CA8 -#define PDQ_EISA_IO_CONFIG_STAT_0 0x0CA9 -#define PDQ_EISA_IO_CONFIG_STAT_1 0x0CAA -#define PDQ_EISA_DMA_CONFIG 0x0CAB -#define PDQ_EISA_INPUT_PORT 0x0CAC -#define PDQ_EISA_OUTPUT_PORT 0x0CAD -#define PDQ_EISA_FUNCTION_CTRL 0x0CAE - #define PDQ_TC_CSR_OFFSET 0x00100000 #define PDQ_TC_CSR_SPACE 0x0040 #define PDQ_FBUS_CSR_OFFSET 0x00200000 Modified: head/sys/dev/pdq/pdqvar.h ============================================================================== --- head/sys/dev/pdq/pdqvar.h Thu Feb 16 21:57:02 2017 (r313833) +++ head/sys/dev/pdq/pdqvar.h Thu Feb 16 21:57:08 2017 (r313834) @@ -53,10 +53,6 @@ typedef enum _pdq_state_t pdq_state_t; enum _pdq_type_t { PDQ_DEFPA, /* PCI-bus */ - PDQ_DEFEA, /* EISA-bus */ - PDQ_DEFTA, /* TurboChannel */ - PDQ_DEFAA, /* FutureBus+ */ - PDQ_DEFQA /* Q-bus */ }; #if defined(PDQTEST)
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?201702162157.v1GLv8XE043713>