Date: Sat, 17 Apr 2010 09:42:07 +0000 (UTC) From: Juli Mallett <jmallett@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r206749 - in head/sys/mips: include mips Message-ID: <201004170942.o3H9g7cF017258@svn.freebsd.org>
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Author: jmallett Date: Sat Apr 17 09:42:07 2010 New Revision: 206749 URL: http://svn.freebsd.org/changeset/base/206749 Log: o) Make pcb_onfault a pointer rather than an obscure integer value. o) Mask off PAGE_MASK bits in pmap_update_page, etc., rather than modifying the badvaddr in trapframe. Some nearby interfaces already did this. o) Make PTEs "unsigned int" for now, not "unsigned long" -- we are only ready for them to be 32-bit on 64-bit platforms. o) Rather than using pmap_segmap and calculating the offset into the page table by hand in trap.c, use pmap_pte(). o) Remove unused quad_syscall variable in trap.c. o) Log things for illegal instructions like we do for bad page faults. o) Various cast cleanups related to how to print registers. o) When logging page faults, show the page table information not just for the program counter, but for the fault address. o) Modify support.S to use ABI-neutral macros for operating on pointers. o) Consistently use CALLFRAME_SIZ rather than STAND_FRAME_SIZE, etc. o) Remove unused insque/remque functions. o) Remove some coprocessor 0 accessor functions implemented in assembly that are unused and have inline assembly counterparts. Modified: head/sys/mips/include/cpu.h head/sys/mips/include/pcb.h head/sys/mips/include/pte.h head/sys/mips/mips/pmap.c head/sys/mips/mips/support.S head/sys/mips/mips/trap.c head/sys/mips/mips/vm_machdep.c Modified: head/sys/mips/include/cpu.h ============================================================================== --- head/sys/mips/include/cpu.h Sat Apr 17 09:37:08 2010 (r206748) +++ head/sys/mips/include/cpu.h Sat Apr 17 09:42:07 2010 (r206749) @@ -458,13 +458,9 @@ extern union cpuprid fpu_id; struct tlb; struct user; -u_int32_t mips_cp0_config1_read(void); int Mips_ConfigCache(void); void Mips_SetWIRED(int); void Mips_SetPID(int); -u_int Mips_GetCOUNT(void); -void Mips_SetCOMPARE(u_int); -u_int Mips_GetCOMPARE(void); void Mips_SyncCache(void); void Mips_SyncDCache(vm_offset_t, int); Modified: head/sys/mips/include/pcb.h ============================================================================== --- head/sys/mips/include/pcb.h Sat Apr 17 09:37:08 2010 (r206748) +++ head/sys/mips/include/pcb.h Sat Apr 17 09:42:07 2010 (r206749) @@ -51,7 +51,7 @@ struct pcb { struct trapframe pcb_regs; /* saved CPU and registers */ __register_t pcb_context[14]; /* kernel context for resume */ - int pcb_onfault; /* for copyin/copyout faults */ + void *pcb_onfault; /* for copyin/copyout faults */ register_t pcb_tpc; }; Modified: head/sys/mips/include/pte.h ============================================================================== --- head/sys/mips/include/pte.h Sat Apr 17 09:37:08 2010 (r206748) +++ head/sys/mips/include/pte.h Sat Apr 17 09:42:07 2010 (r206749) @@ -83,7 +83,7 @@ struct tlb { int tlb_lo1; }; -typedef unsigned long pt_entry_t; +typedef unsigned int pt_entry_t; typedef pt_entry_t *pd_entry_t; #define PDESIZE sizeof(pd_entry_t) /* for assembly files */ Modified: head/sys/mips/mips/pmap.c ============================================================================== --- head/sys/mips/mips/pmap.c Sat Apr 17 09:37:08 2010 (r206748) +++ head/sys/mips/mips/pmap.c Sat Apr 17 09:42:07 2010 (r206749) @@ -660,7 +660,7 @@ pmap_update_page_action(void *arg) pmap->pm_asid[PCPU_GET(cpuid)].gen = 0; return; } - va = pmap_va_asid(pmap, va); + va = pmap_va_asid(pmap, (va & ~PAGE_MASK)); MachTLBUpdate(va, pte); } @@ -669,6 +669,8 @@ pmap_TLB_update_kernel(vm_offset_t va, p { u_int32_t pid; + va &= ~PAGE_MASK; + MachTLBGetPID(pid); va = va | (pid << VMTLB_PID_SHIFT); @@ -1885,7 +1887,7 @@ validate: if (origpte & PTE_M) { KASSERT((origpte & PTE_RW), ("pmap_enter: modified page not writable:" - " va: %p, pte: 0x%lx", (void *)va, origpte)); + " va: %p, pte: 0x%x", (void *)va, origpte)); if (page_is_managed(opa)) vm_page_dirty(om); } @@ -2381,7 +2383,7 @@ pmap_remove_pages(pmap_t pmap) m = PHYS_TO_VM_PAGE(mips_tlbpfn_to_paddr(tpte)); KASSERT(m < &vm_page_array[vm_page_array_size], - ("pmap_remove_pages: bad tpte %lx", tpte)); + ("pmap_remove_pages: bad tpte %x", tpte)); pv->pv_pmap->pm_stats.resident_count--; Modified: head/sys/mips/mips/support.S ============================================================================== --- head/sys/mips/mips/support.S Sat Apr 17 09:37:08 2010 (r206748) +++ head/sys/mips/mips/support.S Sat Apr 17 09:42:07 2010 (r206749) @@ -103,47 +103,22 @@ * Primitives */ -/* - * This table is indexed by u.u_pcb.pcb_onfault in trap(). - * The reason for using this table rather than storing an address in - * u.u_pcb.pcb_onfault is simply to make the code faster. - */ - .globl onfault_table - .data - .align 3 -onfault_table: - .word 0 # invalid index number -#define BADERR 1 - .word baderr -#define COPYERR 2 - .word copyerr -#define FSWBERR 3 - .word fswberr -#define FSWINTRBERR 4 - .word fswintrberr -#if defined(DDB) || defined(DEBUG) -#define DDBERR 5 - .word ddberr -#else - .word 0 -#endif - .text /* * See if access to addr with a len type instruction causes a machine check. - * len is length of access (1=byte, 2=short, 4=long) + * len is length of access (1=byte, 2=short, 4=int) * * badaddr(addr, len) * char *addr; * int len; */ LEAF(badaddr) - li v0, BADERR + PTR_LA v0, baderr GET_CPU_PCPU(v1) - lw v1, PC_CURPCB(v1) + PTR_L v1, PC_CURPCB(v1) bne a1, 1, 2f - sw v0, U_PCB_ONFAULT(v1) + PTR_S v0, U_PCB_ONFAULT(v1) b 5f lbu v0, (a0) 2: @@ -154,7 +129,7 @@ LEAF(badaddr) 4: lw v0, (a0) 5: - sw zero, U_PCB_ONFAULT(v1) + PTR_S zero, U_PCB_ONFAULT(v1) j ra move v0, zero # made it w/o errors baderr: @@ -169,24 +144,24 @@ END(badaddr) * string is too long, return ENAMETOOLONG; else return 0. */ LEAF(copystr) - move t0, a2 - beq a2, zero, 4f + move t0, a2 + beq a2, zero, 4f 1: - lbu v0, 0(a0) - subu a2, a2, 1 - beq v0, zero, 2f - sb v0, 0(a1) # each byte until NIL - addu a0, a0, 1 - bne a2, zero, 1b # less than maxlen - addu a1, a1, 1 + lbu v0, 0(a0) + PTR_SUBU a2, a2, 1 + beq v0, zero, 2f + sb v0, 0(a1) # each byte until NIL + PTR_ADDU a0, a0, 1 + bne a2, zero, 1b # less than maxlen + PTR_ADDU a1, a1, 1 4: - li v0, ENAMETOOLONG # run out of space + li v0, ENAMETOOLONG # run out of space 2: - beq a3, zero, 3f # return num. of copied bytes - subu a2, t0, a2 # if the 4th arg was non-NULL - sw a2, 0(a3) + beq a3, zero, 3f # return num. of copied bytes + PTR_SUBU a2, t0, a2 # if the 4th arg was non-NULL + PTR_S a2, 0(a3) 3: - j ra # v0 is 0 or ENAMETOOLONG + j ra # v0 is 0 or ENAMETOOLONG nop END(copystr) @@ -196,12 +171,12 @@ END(copystr) */ LEAF(fillw) 1: - addiu a2, a2, -1 - sh a0, 0(a1) - bne a2,zero, 1b - addiu a1, a1, 2 + PTR_ADDU a2, a2, -1 + sh a0, 0(a1) + bne a2,zero, 1b + PTR_ADDU a1, a1, 2 - jr ra + jr ra nop END(fillw) @@ -210,13 +185,13 @@ END(fillw) * mem_zero_page(addr); */ LEAF(mem_zero_page) - li v0, PAGE_SIZE + li v0, PAGE_SIZE 1: - subu v0, 8 - sd zero, 0(a0) - bne zero, v0, 1b - addu a0, 8 - jr ra + PTR_SUBU v0, 8 + sd zero, 0(a0) + bne zero, v0, 1b + PTR_ADDU a0, 8 + jr ra nop END(mem_zero_page) @@ -228,56 +203,56 @@ END(mem_zero_page) * a2 = count */ LEAF(insb) - beq a2, zero, 2f - addu a2, a1 + beq a2, zero, 2f + PTR_ADDU a2, a1 1: - lbu v0, 0(a0) - addiu a1, 1 - bne a1, a2, 1b - sb v0, -1(a1) + lbu v0, 0(a0) + PTR_ADDU a1, 1 + bne a1, a2, 1b + sb v0, -1(a1) 2: - jr ra + jr ra nop END(insb) LEAF(insw) - beq a2, zero, 2f - addu a2, a2 - addu a2, a1 -1: - lhu v0, 0(a0) - addiu a1, 2 - bne a1, a2, 1b - sh v0, -2(a1) + beq a2, zero, 2f + PTR_ADDU a2, a2 + PTR_ADDU a2, a1 +1: + lhu v0, 0(a0) + PTR_ADDU a1, 2 + bne a1, a2, 1b + sh v0, -2(a1) 2: - jr ra + jr ra nop END(insw) LEAF(insl) - beq a2, zero, 2f - sll a2, 2 - addu a2, a1 -1: - lw v0, 0(a0) - addiu a1, 4 - bne a1, a2, 1b - sw v0, -4(a1) + beq a2, zero, 2f + sll a2, 2 + PTR_ADDU a2, a1 +1: + lw v0, 0(a0) + PTR_ADDU a1, 4 + bne a1, a2, 1b + sw v0, -4(a1) 2: - jr ra + jr ra nop END(insl) LEAF(outsb) - beq a2, zero, 2f - addu a2, a1 + beq a2, zero, 2f + PTR_ADDU a2, a1 1: - lbu v0, 0(a1) - addiu a1, 1 - bne a1, a2, 1b - sb v0, 0(a0) + lbu v0, 0(a1) + PTR_ADDU a1, 1 + bne a1, a2, 1b + sb v0, 0(a0) 2: - jr ra + jr ra nop END(outsb) @@ -343,22 +318,22 @@ END(outsl) * u_int maxlength; * u_int *lencopied; */ -NON_LEAF(copyinstr, STAND_FRAME_SIZE, ra) - subu sp, sp, STAND_FRAME_SIZE - .mask 0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE) - sw ra, STAND_RA_OFFSET(sp) +NON_LEAF(copyinstr, CALLFRAME_SIZ, ra) + PTR_SUBU sp, sp, CALLFRAME_SIZ + .mask 0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ) + PTR_LA v0, copyerr blt a0, zero, _C_LABEL(copyerr) # make sure address is in user space - li v0, COPYERR + REG_S ra, CALLFRAME_RA(sp) GET_CPU_PCPU(v1) - lw v1, PC_CURPCB(v1) + PTR_L v1, PC_CURPCB(v1) jal _C_LABEL(copystr) - sw v0, U_PCB_ONFAULT(v1) - lw ra, STAND_RA_OFFSET(sp) + PTR_S v0, U_PCB_ONFAULT(v1) + REG_L ra, CALLFRAME_RA(sp) GET_CPU_PCPU(v1) - lw v1, PC_CURPCB(v1) - sw zero, U_PCB_ONFAULT(v1) + PTR_L v1, PC_CURPCB(v1) + PTR_S zero, U_PCB_ONFAULT(v1) j ra - addu sp, sp, STAND_FRAME_SIZE + PTR_ADDU sp, sp, CALLFRAME_SIZ END(copyinstr) /* @@ -371,22 +346,22 @@ END(copyinstr) * u_int maxlength; * u_int *lencopied; */ -NON_LEAF(copyoutstr, STAND_FRAME_SIZE, ra) - subu sp, sp, STAND_FRAME_SIZE - .mask 0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE) - sw ra, STAND_RA_OFFSET(sp) +NON_LEAF(copyoutstr, CALLFRAME_SIZ, ra) + PTR_SUBU sp, sp, CALLFRAME_SIZ + .mask 0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ) + PTR_LA v0, copyerr blt a1, zero, _C_LABEL(copyerr) # make sure address is in user space - li v0, COPYERR + REG_S ra, CALLFRAME_RA(sp) GET_CPU_PCPU(v1) - lw v1, PC_CURPCB(v1) + PTR_L v1, PC_CURPCB(v1) jal _C_LABEL(copystr) - sw v0, U_PCB_ONFAULT(v1) - lw ra, STAND_RA_OFFSET(sp) + PTR_S v0, U_PCB_ONFAULT(v1) + REG_L ra, CALLFRAME_RA(sp) GET_CPU_PCPU(v1) - lw v1, PC_CURPCB(v1) - sw zero, U_PCB_ONFAULT(v1) + PTR_L v1, PC_CURPCB(v1) + PTR_S zero, U_PCB_ONFAULT(v1) j ra - addu sp, sp, STAND_FRAME_SIZE + PTR_ADDU sp, sp, CALLFRAME_SIZ END(copyoutstr) /* @@ -396,21 +371,21 @@ END(copyoutstr) * caddr_t *to; (kernel destination address) * unsigned len; */ -NON_LEAF(copyin, STAND_FRAME_SIZE, ra) - subu sp, sp, STAND_FRAME_SIZE - .mask 0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE) - sw ra, STAND_RA_OFFSET(sp) +NON_LEAF(copyin, CALLFRAME_SIZ, ra) + PTR_SUBU sp, sp, CALLFRAME_SIZ + .mask 0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ) + PTR_LA v0, copyerr blt a0, zero, _C_LABEL(copyerr) # make sure address is in user space - li v0, COPYERR + REG_S ra, CALLFRAME_RA(sp) GET_CPU_PCPU(v1) - lw v1, PC_CURPCB(v1) + PTR_L v1, PC_CURPCB(v1) jal _C_LABEL(bcopy) - sw v0, U_PCB_ONFAULT(v1) - lw ra, STAND_RA_OFFSET(sp) + PTR_S v0, U_PCB_ONFAULT(v1) + REG_L ra, CALLFRAME_RA(sp) GET_CPU_PCPU(v1) - lw v1, PC_CURPCB(v1) # bcopy modified v1, so reload - sw zero, U_PCB_ONFAULT(v1) - addu sp, sp, STAND_FRAME_SIZE + PTR_L v1, PC_CURPCB(v1) # bcopy modified v1, so reload + PTR_S zero, U_PCB_ONFAULT(v1) + PTR_ADDU sp, sp, CALLFRAME_SIZ j ra move v0, zero END(copyin) @@ -422,31 +397,28 @@ END(copyin) * caddr_t *to; (user destination address) * unsigned len; */ -NON_LEAF(copyout, STAND_FRAME_SIZE, ra) - subu sp, sp, STAND_FRAME_SIZE - .mask 0x80000000, (STAND_RA_OFFSET - STAND_FRAME_SIZE) - sw ra, STAND_RA_OFFSET(sp) +NON_LEAF(copyout, CALLFRAME_SIZ, ra) + PTR_SUBU sp, sp, CALLFRAME_SIZ + .mask 0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ) + PTR_LA v0, copyerr blt a1, zero, _C_LABEL(copyerr) # make sure address is in user space - li v0, COPYERR + REG_S ra, CALLFRAME_RA(sp) GET_CPU_PCPU(v1) - lw v1, PC_CURPCB(v1) + PTR_L v1, PC_CURPCB(v1) jal _C_LABEL(bcopy) - sw v0, U_PCB_ONFAULT(v1) - lw ra, STAND_RA_OFFSET(sp) + PTR_S v0, U_PCB_ONFAULT(v1) + REG_L ra, CALLFRAME_RA(sp) GET_CPU_PCPU(v1) - lw v1, PC_CURPCB(v1) # bcopy modified v1, so reload - sw zero, U_PCB_ONFAULT(v1) - addu sp, sp, STAND_FRAME_SIZE + PTR_L v1, PC_CURPCB(v1) # bcopy modified v1, so reload + PTR_S zero, U_PCB_ONFAULT(v1) + PTR_ADDU sp, sp, CALLFRAME_SIZ j ra move v0, zero END(copyout) LEAF(copyerr) - lw ra, STAND_RA_OFFSET(sp) - GET_CPU_PCPU(v1) - lw v1, PC_CURPCB(v1) - sw zero, U_PCB_ONFAULT(v1) - addu sp, sp, STAND_FRAME_SIZE + REG_L ra, CALLFRAME_RA(sp) + PTR_ADDU sp, sp, CALLFRAME_SIZ j ra li v0, EFAULT # return error END(copyerr) @@ -460,51 +432,55 @@ END(copyerr) LEAF(fuword) ALEAF(fuword32) ALEAF(fuiword) + PTR_LA v0, fswberr blt a0, zero, fswberr # make sure address is in user space - li v0, FSWBERR + nop GET_CPU_PCPU(v1) - lw v1, PC_CURPCB(v1) - sw v0, U_PCB_ONFAULT(v1) + PTR_L v1, PC_CURPCB(v1) + PTR_S v0, U_PCB_ONFAULT(v1) lw v0, 0(a0) # fetch word j ra - sw zero, U_PCB_ONFAULT(v1) + PTR_S zero, U_PCB_ONFAULT(v1) END(fuword) LEAF(fusword) ALEAF(fuisword) + PTR_LA v0, fswberr blt a0, zero, fswberr # make sure address is in user space - li v0, FSWBERR + nop GET_CPU_PCPU(v1) - lw v1, PC_CURPCB(v1) - sw v0, U_PCB_ONFAULT(v1) + PTR_L v1, PC_CURPCB(v1) + PTR_S v0, U_PCB_ONFAULT(v1) lhu v0, 0(a0) # fetch short j ra - sw zero, U_PCB_ONFAULT(v1) + PTR_S zero, U_PCB_ONFAULT(v1) END(fusword) LEAF(fubyte) ALEAF(fuibyte) + PTR_LA v0, fswberr blt a0, zero, fswberr # make sure address is in user space - li v0, FSWBERR + nop GET_CPU_PCPU(v1) - lw v1, PC_CURPCB(v1) - sw v0, U_PCB_ONFAULT(v1) + PTR_L v1, PC_CURPCB(v1) + PTR_S v0, U_PCB_ONFAULT(v1) lbu v0, 0(a0) # fetch byte j ra - sw zero, U_PCB_ONFAULT(v1) + PTR_S zero, U_PCB_ONFAULT(v1) END(fubyte) LEAF(suword32) #ifndef __mips_n64 XLEAF(suword) #endif + PTR_LA v0, fswberr blt a0, zero, fswberr # make sure address is in user space - li v0, FSWBERR + nop GET_CPU_PCPU(v1) - lw v1, PC_CURPCB(v1) - sw v0, U_PCB_ONFAULT(v1) + PTR_L v1, PC_CURPCB(v1) + PTR_S v0, U_PCB_ONFAULT(v1) sw a1, 0(a0) # store word - sw zero, U_PCB_ONFAULT(v1) + PTR_S zero, U_PCB_ONFAULT(v1) j ra move v0, zero END(suword32) @@ -512,13 +488,14 @@ END(suword32) #ifdef __mips_n64 LEAF(suword64) XLEAF(suword) + PTR_LA v0, fswberr blt a0, zero, fswberr # make sure address is in user space - li v0, FSWBERR + nop GET_CPU_PCPU(v1) - lw v1, PC_CURPCB(v1) - sw v0, U_PCB_ONFAULT(v1) + PTR_L v1, PC_CURPCB(v1) + PTR_S v0, U_PCB_ONFAULT(v1) sd a1, 0(a0) # store word - sw zero, U_PCB_ONFAULT(v1) + PTR_S zero, U_PCB_ONFAULT(v1) j ra move v0, zero END(suword64) @@ -537,11 +514,12 @@ LEAF(casuword32) #ifndef __mips_n64 XLEAF(casuword) #endif + PTR_LA v0, fswberr blt a0, zero, fswberr # make sure address is in user space - li v0, FSWBERR + nop GET_CPU_PCPU(v1) - lw v1, PC_CURPCB(v1) - sw v0, U_PCB_ONFAULT(v1) + PTR_L v1, PC_CURPCB(v1) + PTR_S v0, U_PCB_ONFAULT(v1) 1: move t0, a2 ll v0, 0(a0) @@ -555,7 +533,7 @@ XLEAF(casuword) 2: li v0, -1 3: - sw zero, U_PCB_ONFAULT(v1) + PTR_S zero, U_PCB_ONFAULT(v1) jr ra nop END(casuword32) @@ -563,11 +541,12 @@ END(casuword32) #ifdef __mips_n64 LEAF(casuword64) XLEAF(casuword) + PTR_LA v0, fswberr blt a0, zero, fswberr # make sure address is in user space - li v0, FSWBERR + nop GET_CPU_PCPU(v1) - lw v1, PC_CURPCB(v1) - sw v0, U_PCB_ONFAULT(v1) + PTR_L v1, PC_CURPCB(v1) + PTR_S v0, U_PCB_ONFAULT(v1) 1: move t0, a2 lld v0, 0(a0) @@ -581,7 +560,7 @@ XLEAF(casuword) 2: li v0, -1 3: - sw zero, U_PCB_ONFAULT(v1) + PTR_S zero, U_PCB_ONFAULT(v1) jr ra nop END(casuword64) @@ -593,13 +572,14 @@ END(casuword64) * Have to flush instruction cache afterwards. */ LEAF(suiword) + PTR_LA v0, fswberr blt a0, zero, fswberr # make sure address is in user space - li v0, FSWBERR + nop GET_CPU_PCPU(v1) - lw v1, PC_CURPCB(v1) - sw v0, U_PCB_ONFAULT(v1) + PTR_L v1, PC_CURPCB(v1) + PTR_S v0, U_PCB_ONFAULT(v1) sw a1, 0(a0) # store word - sw zero, U_PCB_ONFAULT(v1) + PTR_S zero, U_PCB_ONFAULT(v1) j _C_LABEL(Mips_SyncICache) # FlushICache sets v0 = 0. (Ugly) li a1, 4 # size of word END(suiword) @@ -610,26 +590,28 @@ END(suiword) */ LEAF(susword) ALEAF(suisword) + PTR_LA v0, fswberr blt a0, zero, fswberr # make sure address is in user space - li v0, FSWBERR + nop GET_CPU_PCPU(v1) - lw v1, PC_CURPCB(v1) - sw v0, U_PCB_ONFAULT(v1) + PTR_L v1, PC_CURPCB(v1) + PTR_S v0, U_PCB_ONFAULT(v1) sh a1, 0(a0) # store short - sw zero, U_PCB_ONFAULT(v1) + PTR_S zero, U_PCB_ONFAULT(v1) j ra move v0, zero END(susword) LEAF(subyte) ALEAF(suibyte) + PTR_LA v0, fswberr blt a0, zero, fswberr # make sure address is in user space - li v0, FSWBERR + nop GET_CPU_PCPU(v1) - lw v1, PC_CURPCB(v1) - sw v0, U_PCB_ONFAULT(v1) + PTR_L v1, PC_CURPCB(v1) + PTR_S v0, U_PCB_ONFAULT(v1) sb a1, 0(a0) # store byte - sw zero, U_PCB_ONFAULT(v1) + PTR_S zero, U_PCB_ONFAULT(v1) j ra move v0, zero END(subyte) @@ -645,24 +627,26 @@ END(fswberr) * The important thing is to prevent sleep() and switch(). */ LEAF(fuswintr) + PTR_LA v0, fswintrberr blt a0, zero, fswintrberr # make sure address is in user space - li v0, FSWINTRBERR + nop GET_CPU_PCPU(v1) - lw v1, PC_CURPCB(v1) - sw v0, U_PCB_ONFAULT(v1) + PTR_L v1, PC_CURPCB(v1) + PTR_S v0, U_PCB_ONFAULT(v1) lhu v0, 0(a0) # fetch short j ra - sw zero, U_PCB_ONFAULT(v1) + PTR_S zero, U_PCB_ONFAULT(v1) END(fuswintr) LEAF(suswintr) + PTR_LA v0, fswintrberr blt a0, zero, fswintrberr # make sure address is in user space - li v0, FSWINTRBERR + nop GET_CPU_PCPU(v1) - lw v1, PC_CURPCB(v1) - sw v0, U_PCB_ONFAULT(v1) + PTR_L v1, PC_CURPCB(v1) + PTR_S v0, U_PCB_ONFAULT(v1) sh a1, 0(a0) # store short - sw zero, U_PCB_ONFAULT(v1) + PTR_S zero, U_PCB_ONFAULT(v1) j ra move v0, zero END(suswintr) @@ -673,111 +657,6 @@ LEAF(fswintrberr) END(fswintrberr) /* - * Insert 'p' after 'q'. - * _insque(p, q) - * caddr_t p, q; - */ -LEAF(_insque) - lw v0, 0(a1) # v0 = q->next - sw a1, 4(a0) # p->prev = q - sw v0, 0(a0) # p->next = q->next - sw a0, 4(v0) # q->next->prev = p - j ra - sw a0, 0(a1) # q->next = p -END(_insque) - -/* - * Remove item 'p' from queue. - * _remque(p) - * caddr_t p; - */ -LEAF(_remque) - lw v0, 0(a0) # v0 = p->next - lw v1, 4(a0) # v1 = p->prev - nop - sw v0, 0(v1) # p->prev->next = p->next - j ra - sw v1, 4(v0) # p->next->prev = p->prev -END(_remque) - -/*-------------------------------------------------------------------------- - * - * Mips_GetCOUNT -- - * - * Mips_GetCOUNT() - * - * Results: - * Returns the current COUNT reg. - * - * Side effects: - * None. - * - *-------------------------------------------------------------------------- - */ -LEAF(Mips_GetCOUNT) - mfc0 v0, COP_0_COUNT - nop #??? - nop #??? - j ra - nop -END(Mips_GetCOUNT) - -/*-------------------------------------------------------------------------- - * - * Mips_SetCOMPARE -- - * - * Mips_SetCOMPARE() - * - * Results: - * Sets a new value to the COMPARE register. - * - * Side effects: - * The COMPARE equal interrupt is acknowledged. - * - *-------------------------------------------------------------------------- - */ -LEAF(Mips_SetCOMPARE) - mtc0 a0, COP_0_COMPARE - j ra - nop -END(Mips_SetCOMPARE) - -LEAF(Mips_GetCOMPARE) - mfc0 v0, COP_0_COMPARE - j ra - nop -END(Mips_GetCOMPARE) - -/* - * u_int32_t mips_cp0_status_read(void) - * - * Return the current value of the CP0 Status register. - */ -LEAF(mips_cp0_status_read) - mfc0 v0, COP_0_STATUS_REG - j ra - nop -END(mips_cp0_status_read) - -/* - * void mips_cp0_status_write(u_int32_t) - * - * Set the value of the CP0 Status register. - * - * Note: This is almost certainly not the way you want to write a - * "permanent" value to to the CP0 Status register, since it gets - * saved in trap frames and restores. - */ -LEAF(mips_cp0_status_write) - mtc0 a0, COP_0_STATUS_REG - nop - nop - j ra - nop -END(mips_cp0_status_write) - - -/* * memcpy(to, from, len) * {ov}bcopy(from, to, len) */ @@ -789,7 +668,7 @@ LEAF(memcpy) ALEAF(bcopy) ALEAF(ovbcopy) .set noreorder - addu t0, a0, a2 # t0 = end of s1 region + PTR_ADDU t0, a0, a2 # t0 = end of s1 region sltu t1, a1, t0 sltu t2, a0, a1 and t1, t1, t2 # t1 = true if from < to < (from+len) @@ -797,11 +676,11 @@ ALEAF(ovbcopy) slt t2, a2, 12 # check for small copy ble a2, zero, 2f - addu t1, a1, a2 # t1 = end of to region + PTR_ADDU t1, a1, a2 # t1 = end of to region 1: lb v1, -1(t0) # copy bytes backwards, - subu t0, t0, 1 # doesnt happen often so do slow way - subu t1, t1, 1 + PTR_SUBU t0, t0, 1 # doesnt happen often so do slow way + PTR_SUBU t1, t1, 1 bne t0, a0, 1b sb v1, 0(t1) 2: @@ -811,59 +690,59 @@ forward: bne t2, zero, smallcpy # do a small bcopy xor v1, a0, a1 # compare low two bits of addresses and v1, v1, 3 - subu a3, zero, a1 # compute # bytes to word align address + PTR_SUBU a3, zero, a1 # compute # bytes to word align address beq v1, zero, aligned # addresses can be word aligned and a3, a3, 3 beq a3, zero, 1f - subu a2, a2, a3 # subtract from remaining count + PTR_SUBU a2, a2, a3 # subtract from remaining count LWHI v1, 0(a0) # get next 4 bytes (unaligned) LWLO v1, 3(a0) - addu a0, a0, a3 + PTR_ADDU a0, a0, a3 SWHI v1, 0(a1) # store 1, 2, or 3 bytes to align a1 - addu a1, a1, a3 + PTR_ADDU a1, a1, a3 1: and v1, a2, 3 # compute number of words left - subu a3, a2, v1 + PTR_SUBU a3, a2, v1 move a2, v1 - addu a3, a3, a0 # compute ending address + PTR_ADDU a3, a3, a0 # compute ending address 2: LWHI v1, 0(a0) # copy words a0 unaligned, a1 aligned LWLO v1, 3(a0) - addu a0, a0, 4 + PTR_ADDU a0, a0, 4 sw v1, 0(a1) - addu a1, a1, 4 + PTR_ADDU a1, a1, 4 bne a0, a3, 2b nop # We have to do this mmu-bug. b smallcpy nop aligned: beq a3, zero, 1f - subu a2, a2, a3 # subtract from remaining count + PTR_SUBU a2, a2, a3 # subtract from remaining count LWHI v1, 0(a0) # copy 1, 2, or 3 bytes to align - addu a0, a0, a3 + PTR_ADDU a0, a0, a3 SWHI v1, 0(a1) - addu a1, a1, a3 + PTR_ADDU a1, a1, a3 1: and v1, a2, 3 # compute number of whole words left - subu a3, a2, v1 + PTR_SUBU a3, a2, v1 move a2, v1 - addu a3, a3, a0 # compute ending address + PTR_ADDU a3, a3, a0 # compute ending address 2: lw v1, 0(a0) # copy words - addu a0, a0, 4 + PTR_ADDU a0, a0, 4 sw v1, 0(a1) bne a0, a3, 2b - addu a1, a1, 4 + PTR_ADDU a1, a1, 4 smallcpy: ble a2, zero, 2f - addu a3, a2, a0 # compute ending address + PTR_ADDU a3, a2, a0 # compute ending address 1: lbu v1, 0(a0) # copy bytes - addu a0, a0, 1 + PTR_ADDU a0, a0, 1 sb v1, 0(a1) bne a0, a3, 1b - addu a1, a1, 1 # MMU BUG ? can not do -1(a1) at 0x80000000!! + PTR_ADDU a1, a1, 1 # MMU BUG ? can not do -1(a1) at 0x80000000!! 2: j ra nop @@ -883,19 +762,19 @@ LEAF(memset) sll t2, t1, 16 # shift that left 16 or t1, t2, t1 # or together - subu t0, zero, a0 # compute # bytes to word align address + PTR_SUBU t0, zero, a0 # compute # bytes to word align address and t0, t0, 3 beq t0, zero, 1f # skip if word aligned - subu a2, a2, t0 # subtract from remaining count + PTR_SUBU a2, a2, t0 # subtract from remaining count SWHI t1, 0(a0) # store 1, 2, or 3 bytes to align - addu a0, a0, t0 + PTR_ADDU a0, a0, t0 1: and v1, a2, 3 # compute number of whole words left - subu t0, a2, v1 - subu a2, a2, t0 - addu t0, t0, a0 # compute ending address + PTR_SUBU t0, a2, v1 + PTR_SUBU a2, a2, t0 + PTR_ADDU t0, t0, a0 # compute ending address 2: - addu a0, a0, 4 # clear words + PTR_ADDU a0, a0, 4 # clear words #ifdef MIPS3_5900 nop nop @@ -907,9 +786,9 @@ LEAF(memset) memsetsmallclr: ble a2, zero, 2f - addu t0, a2, a0 # compute ending address + PTR_ADDU t0, a2, a0 # compute ending address 1: - addu a0, a0, 1 # clear bytes + PTR_ADDU a0, a0, 1 # clear bytes #ifdef MIPS3_5900 nop nop @@ -931,26 +810,26 @@ LEAF(bzero) ALEAF(blkclr) .set noreorder blt a1, 12, smallclr # small amount to clear? - subu a3, zero, a0 # compute # bytes to word align address + PTR_SUBU a3, zero, a0 # compute # bytes to word align address and a3, a3, 3 beq a3, zero, 1f # skip if word aligned - subu a1, a1, a3 # subtract from remaining count + PTR_SUBU a1, a1, a3 # subtract from remaining count SWHI zero, 0(a0) # clear 1, 2, or 3 bytes to align - addu a0, a0, a3 + PTR_ADDU a0, a0, a3 1: and v0, a1, 3 # compute number of words left - subu a3, a1, v0 + PTR_SUBU a3, a1, v0 move a1, v0 - addu a3, a3, a0 # compute ending address + PTR_ADDU a3, a3, a0 # compute ending address 2: - addu a0, a0, 4 # clear words + PTR_ADDU a0, a0, 4 # clear words bne a0, a3, 2b # unrolling loop does not help sw zero, -4(a0) # since we are limited by memory speed smallclr: ble a1, zero, 2f - addu a3, a1, a0 # compute ending address + PTR_ADDU a3, a1, a0 # compute ending address 1: - addu a0, a0, 1 # clear bytes + PTR_ADDU a0, a0, 1 # clear bytes bne a0, a3, 1b sb zero, -1(a0) 2: @@ -967,66 +846,66 @@ LEAF(bcmp) blt a2, 16, smallcmp # is it worth any trouble? xor v0, a0, a1 # compare low two bits of addresses and v0, v0, 3 - subu a3, zero, a1 # compute # bytes to word align address + PTR_SUBU a3, zero, a1 # compute # bytes to word align address bne v0, zero, unalignedcmp # not possible to align addresses and a3, a3, 3 beq a3, zero, 1f - subu a2, a2, a3 # subtract from remaining count + PTR_SUBU a2, a2, a3 # subtract from remaining count move v0, v1 # init v0,v1 so unmodified bytes match LWHI v0, 0(a0) # read 1, 2, or 3 bytes LWHI v1, 0(a1) - addu a1, a1, a3 + PTR_ADDU a1, a1, a3 bne v0, v1, nomatch - addu a0, a0, a3 + PTR_ADDU a0, a0, a3 1: and a3, a2, ~3 # compute number of whole words left - subu a2, a2, a3 # which has to be >= (16-3) & ~3 - addu a3, a3, a0 # compute ending address + PTR_SUBU a2, a2, a3 # which has to be >= (16-3) & ~3 + PTR_ADDU a3, a3, a0 # compute ending address 2: lw v0, 0(a0) # compare words lw v1, 0(a1) *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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