Date: Fri, 15 Dec 2023 18:57:26 GMT From: Kyle Evans <kevans@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org Subject: git: 6a415720f54d - stable/13 - arm64: lop off another 24MB of KVA for early device mappings Message-ID: <202312151857.3BFIvQCt018166@gitrepo.freebsd.org>
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The branch stable/13 has been updated by kevans: URL: https://cgit.FreeBSD.org/src/commit/?id=6a415720f54df09aff13fc991c9937cef986674f commit 6a415720f54df09aff13fc991c9937cef986674f Author: Kyle Evans <kevans@FreeBSD.org> AuthorDate: 2023-11-23 16:21:33 +0000 Commit: Kyle Evans <kevans@FreeBSD.org> CommitDate: 2023-12-15 00:59:09 +0000 arm64: lop off another 24MB of KVA for early device mappings This grows the block enough to fit a 4K 32-bit depth framebuffer; some firmware would present smaller GOP modes to be able to boot with a smaller framebuffer on these devices, but the Windows Devkit firmware is simply not that nice. Instead, it offers exactly one GOP mode that matches the current resolution of the attached display, so with limited control over resolution on most of my displays it'd be nice if we could Just Work(TM) at 4K. andrew notes that he has some ideas for removing PMAP_MAPDEV_EARLY_SIZE entirely, so this limitation could end up removed altogether in the future. Reviewed by: andrew, emaste (cherry picked from commit a3ceeef26bc880b86f4e181bddd9924a2b5e0691) --- sys/arm64/include/pte.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/sys/arm64/include/pte.h b/sys/arm64/include/pte.h index f1b11c3a0189..478bd85aa2e2 100644 --- a/sys/arm64/include/pte.h +++ b/sys/arm64/include/pte.h @@ -143,7 +143,11 @@ typedef uint64_t pt_entry_t; /* page table entry */ /* 0x2 also marks an invalid address */ #define L3_PAGE 0x3 -#define PMAP_MAPDEV_EARLY_SIZE (L2_SIZE * 8) +/* + * A substantial portion of this is to make sure that we can cope with 4K + * framebuffers in early boot, assuming a common 4K resolution @ 32-bit depth. + */ +#define PMAP_MAPDEV_EARLY_SIZE (L2_SIZE * 20) #define L0_ENTRIES_SHIFT 9 #define L0_ENTRIES (1 << L0_ENTRIES_SHIFT)
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