Date: Fri, 5 Dec 2008 21:17:54 +0000 (UTC) From: Konstantin Belousov <kib@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r185651 - head/sys/i386/include Message-ID: <200812052117.mB5LHshQ073411@svn.freebsd.org>
next in thread | raw e-mail | index | archive | help
Author: kib Date: Fri Dec 5 21:17:54 2008 New Revision: 185651 URL: http://svn.freebsd.org/changeset/base/185651 Log: Unconditionally use locked addition of zero to tip of the stack for memory barriers on i386. It works as a serialization instruction on all IA32 CPUs. Alternative solution of using {s,l,}fence requires run-time checking of the presense of the corresponding SSE or SSE2 extensions, and possible boot-time patching of the kernel text. Suggested by: many Modified: head/sys/i386/include/atomic.h Modified: head/sys/i386/include/atomic.h ============================================================================== --- head/sys/i386/include/atomic.h Fri Dec 5 21:17:19 2008 (r185650) +++ head/sys/i386/include/atomic.h Fri Dec 5 21:17:54 2008 (r185651) @@ -32,20 +32,9 @@ #error this file needs sys/cdefs.h as a prerequisite #endif - -#if defined(I686_CPU) -#define mb() __asm__ __volatile__ ("mfence;": : :"memory") -#define wmb() __asm__ __volatile__ ("sfence;": : :"memory") -#define rmb() __asm__ __volatile__ ("lfence;": : :"memory") -#else -/* - * do we need a serializing instruction? - */ -#define mb() -#define wmb() -#define rmb() -#endif - +#define mb() __asm __volatile("lock;addl $0,(%esp)") +#define wmb() __asm __volatile("lock;addl $0,(%esp)") +#define rmb() __asm __volatile("lock;addl $0,(%esp)") /* * Various simple operations on memory, each of which is atomic in the
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?200812052117.mB5LHshQ073411>