Date: Sun, 26 Oct 2014 02:37:43 +0000 (UTC) From: Ian Lepore <ian@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-10@freebsd.org Subject: svn commit: r273661 - in stable/10/sys: arm/conf arm/freescale/imx boot/fdt/dts/arm Message-ID: <201410260237.s9Q2bhed089849@svn.freebsd.org>
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Author: ian Date: Sun Oct 26 02:37:42 2014 New Revision: 273661 URL: https://svnweb.freebsd.org/changeset/base/273661 Log: MFC r268834, r268835: o Enable GPIO device driver for i.MX6. It was originally written for i.MX5 and compatible with newer chip. o Extend device tree information o style(9) fixes o Rename gpio driver file. Added: stable/10/sys/arm/freescale/imx/imx_gpio.c - copied unchanged from r268835, head/sys/arm/freescale/imx/imx_gpio.c Deleted: stable/10/sys/arm/freescale/imx/imx51_gpio.c Modified: stable/10/sys/arm/conf/IMX6 stable/10/sys/arm/freescale/imx/files.imx51 stable/10/sys/arm/freescale/imx/files.imx53 stable/10/sys/arm/freescale/imx/files.imx6 stable/10/sys/boot/fdt/dts/arm/imx6.dtsi stable/10/sys/boot/fdt/dts/arm/wandboard-dual.dts stable/10/sys/boot/fdt/dts/arm/wandboard-quad.dts stable/10/sys/boot/fdt/dts/arm/wandboard-solo.dts Directory Properties: stable/10/ (props changed) Modified: stable/10/sys/arm/conf/IMX6 ============================================================================== --- stable/10/sys/arm/conf/IMX6 Sun Oct 26 02:27:10 2014 (r273660) +++ stable/10/sys/arm/conf/IMX6 Sun Oct 26 02:37:42 2014 (r273661) @@ -82,6 +82,9 @@ device miibus # Required for etherne device bpf # Berkeley packet filter (required for DHCP) #device iomux # IO Multiplexor +# General-purpose input/output +device gpio + # Serial (COM) ports device uart # Multi-uart driver @@ -106,7 +109,7 @@ device u3g # USB modems #device ukbd # Allow keyboard like HIDs to control console #device ums # USB mouse -# USB Ethernet, requires miibus +# USB Ethernet, requires miibus #device aue # ADMtek USB Ethernet #device axe # ASIX Electronics USB Ethernet #device cdce # Generic USB over Ethernet Modified: stable/10/sys/arm/freescale/imx/files.imx51 ============================================================================== --- stable/10/sys/arm/freescale/imx/files.imx51 Sun Oct 26 02:27:10 2014 (r273660) +++ stable/10/sys/arm/freescale/imx/files.imx51 Sun Oct 26 02:37:42 2014 (r273661) @@ -22,7 +22,7 @@ arm/freescale/imx/tzic.c standard arm/freescale/imx/imx51_iomux.c optional iomux # GPIO -arm/freescale/imx/imx51_gpio.c optional gpio +arm/freescale/imx/imx_gpio.c optional gpio # Generic Periodic Timer arm/freescale/imx/imx_gpt.c standard Modified: stable/10/sys/arm/freescale/imx/files.imx53 ============================================================================== --- stable/10/sys/arm/freescale/imx/files.imx53 Sun Oct 26 02:27:10 2014 (r273660) +++ stable/10/sys/arm/freescale/imx/files.imx53 Sun Oct 26 02:37:42 2014 (r273661) @@ -25,7 +25,7 @@ arm/freescale/imx/tzic.c standard arm/freescale/imx/imx51_iomux.c optional iomux # GPIO -arm/freescale/imx/imx51_gpio.c optional gpio +arm/freescale/imx/imx_gpio.c optional gpio # Generic Periodic Timer arm/freescale/imx/imx_gpt.c standard Modified: stable/10/sys/arm/freescale/imx/files.imx6 ============================================================================== --- stable/10/sys/arm/freescale/imx/files.imx6 Sun Oct 26 02:27:10 2014 (r273660) +++ stable/10/sys/arm/freescale/imx/files.imx6 Sun Oct 26 02:37:42 2014 (r273661) @@ -26,6 +26,7 @@ arm/freescale/imx/imx6_mp.c optional sm arm/freescale/imx/imx6_pl310.c standard arm/freescale/imx/imx_machdep.c standard arm/freescale/imx/imx_gpt.c standard +arm/freescale/imx/imx_gpio.c optional gpio # # Optional devices. @@ -50,8 +51,6 @@ arm/freescale/imx/imx6_usbphy.c optiona # Not ready yet... # #arm/freescale/imx/imx51_iomux.c optional iomux -#arm/freescale/imx/imx51_gpio.c optional gpio #dev/ata/chipsets/ata-fsl.c optional imxata #arm/freescale/imx/i2c.c optional fsliic #arm/freescale/imx/imx51_ipuv3.c optional sc - Copied: stable/10/sys/arm/freescale/imx/imx_gpio.c (from r268835, head/sys/arm/freescale/imx/imx_gpio.c) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ stable/10/sys/arm/freescale/imx/imx_gpio.c Sun Oct 26 02:37:42 2014 (r273661, copy of r268835, head/sys/arm/freescale/imx/imx_gpio.c) @@ -0,0 +1,491 @@ +/*- + * Copyright (c) 2012, 2013 The FreeBSD Foundation + * All rights reserved. + * + * This software was developed by Oleksandr Rybalko under sponsorship + * from the FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +/* + * Freescale i.MX515 GPIO driver. + */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/bus.h> + +#include <sys/kernel.h> +#include <sys/module.h> +#include <sys/rman.h> +#include <sys/lock.h> +#include <sys/mutex.h> +#include <sys/gpio.h> + +#include <machine/bus.h> +#include <machine/resource.h> + +#include <dev/fdt/fdt_common.h> +#include <dev/ofw/openfirm.h> +#include <dev/ofw/ofw_bus.h> +#include <dev/ofw/ofw_bus_subr.h> + +#include "gpio_if.h" + +#define GPIO_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) +#define GPIO_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) +#define GPIO_LOCK_INIT(_sc) mtx_init(&_sc->sc_mtx, \ + device_get_nameunit(_sc->sc_dev), "imx_gpio", MTX_DEF) +#define GPIO_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx); +#define GPIO_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED); +#define GPIO_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED); + +#define WRITE4(_sc, _r, _v) \ + bus_space_write_4((_sc)->sc_iot, (_sc)->sc_ioh, (_r), (_v)) +#define READ4(_sc, _r) \ + bus_space_read_4((_sc)->sc_iot, (_sc)->sc_ioh, (_r)) +#define SET4(_sc, _r, _m) \ + WRITE4((_sc), (_r), READ4((_sc), (_r)) | (_m)) +#define CLEAR4(_sc, _r, _m) \ + WRITE4((_sc), (_r), READ4((_sc), (_r)) & ~(_m)) + +/* Registers definition for Freescale i.MX515 GPIO controller */ + +#define IMX_GPIO_DR_REG 0x000 /* Pin Data */ +#define IMX_GPIO_OE_REG 0x004 /* Set Pin Output */ +#define IMX_GPIO_PSR_REG 0x008 /* Pad Status */ +#define IMX_GPIO_ICR1_REG 0x00C /* Interrupt Configuration */ +#define IMX_GPIO_ICR2_REG 0x010 /* Interrupt Configuration */ +#define GPIO_ICR_COND_LOW 0 +#define GPIO_ICR_COND_HIGH 1 +#define GPIO_ICR_COND_RISE 2 +#define GPIO_ICR_COND_FALL 3 +#define IMX_GPIO_IMR_REG 0x014 /* Interrupt Mask Register */ +#define IMX_GPIO_ISR_REG 0x018 /* Interrupt Status Register */ +#define IMX_GPIO_EDGE_REG 0x01C /* Edge Detect Register */ + +#define DEFAULT_CAPS (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT) +#define NGPIO 32 + +struct imx51_gpio_softc { + device_t dev; + struct mtx sc_mtx; + struct resource *sc_res[11]; /* 1 x mem, 2 x IRQ, 8 x IRQ */ + void *gpio_ih[11]; /* 1 ptr is not a big waste */ + int sc_l_irq; /* Last irq resource */ + bus_space_tag_t sc_iot; + bus_space_handle_t sc_ioh; + int gpio_npins; + struct gpio_pin gpio_pins[NGPIO]; +}; + +static struct ofw_compat_data compat_data[] = { + {"fsl,imx6q-gpio", 1}, + {"fsl,imx53-gpio", 1}, + {"fsl,imx51-gpio", 1}, + {NULL, 0} +}; + +static struct resource_spec imx_gpio_spec[] = { + { SYS_RES_MEMORY, 0, RF_ACTIVE }, + { SYS_RES_IRQ, 0, RF_ACTIVE }, + { SYS_RES_IRQ, 1, RF_ACTIVE }, + { -1, 0 } +}; + +static struct resource_spec imx_gpio0irq_spec[] = { + { SYS_RES_IRQ, 2, RF_ACTIVE }, + { SYS_RES_IRQ, 3, RF_ACTIVE }, + { SYS_RES_IRQ, 4, RF_ACTIVE }, + { SYS_RES_IRQ, 5, RF_ACTIVE }, + { SYS_RES_IRQ, 6, RF_ACTIVE }, + { SYS_RES_IRQ, 7, RF_ACTIVE }, + { SYS_RES_IRQ, 8, RF_ACTIVE }, + { SYS_RES_IRQ, 9, RF_ACTIVE }, + { -1, 0 } +}; + +/* + * Helpers + */ +static void imx51_gpio_pin_configure(struct imx51_gpio_softc *, + struct gpio_pin *, uint32_t); + +/* + * Driver stuff + */ +static int imx51_gpio_probe(device_t); +static int imx51_gpio_attach(device_t); +static int imx51_gpio_detach(device_t); +static int imx51_gpio_intr(void *); + +/* + * GPIO interface + */ +static int imx51_gpio_pin_max(device_t, int *); +static int imx51_gpio_pin_getcaps(device_t, uint32_t, uint32_t *); +static int imx51_gpio_pin_getflags(device_t, uint32_t, uint32_t *); +static int imx51_gpio_pin_getname(device_t, uint32_t, char *); +static int imx51_gpio_pin_setflags(device_t, uint32_t, uint32_t); +static int imx51_gpio_pin_set(device_t, uint32_t, unsigned int); +static int imx51_gpio_pin_get(device_t, uint32_t, unsigned int *); +static int imx51_gpio_pin_toggle(device_t, uint32_t pin); + +static void +imx51_gpio_pin_configure(struct imx51_gpio_softc *sc, struct gpio_pin *pin, + unsigned int flags) +{ + + GPIO_LOCK(sc); + + /* + * Manage input/output + */ + if (flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) { + pin->gp_flags &= ~(GPIO_PIN_INPUT|GPIO_PIN_OUTPUT); + if (flags & GPIO_PIN_OUTPUT) { + pin->gp_flags |= GPIO_PIN_OUTPUT; + SET4(sc, IMX_GPIO_OE_REG, (1 << pin->gp_pin)); + } + else { + pin->gp_flags |= GPIO_PIN_INPUT; + CLEAR4(sc, IMX_GPIO_OE_REG, (1 << pin->gp_pin)); + } + } + + GPIO_UNLOCK(sc); +} + +static int +imx51_gpio_pin_max(device_t dev, int *maxpin) +{ + + *maxpin = NGPIO - 1; + return (0); +} + +static int +imx51_gpio_pin_getcaps(device_t dev, uint32_t pin, uint32_t *caps) +{ + struct imx51_gpio_softc *sc; + int i; + + sc = device_get_softc(dev); + for (i = 0; i < sc->gpio_npins; i++) { + if (sc->gpio_pins[i].gp_pin == pin) + break; + } + + if (i >= sc->gpio_npins) + return (EINVAL); + + GPIO_LOCK(sc); + *caps = sc->gpio_pins[i].gp_caps; + GPIO_UNLOCK(sc); + + return (0); +} + +static int +imx51_gpio_pin_getflags(device_t dev, uint32_t pin, uint32_t *flags) +{ + struct imx51_gpio_softc *sc; + int i; + + sc = device_get_softc(dev); + for (i = 0; i < sc->gpio_npins; i++) { + if (sc->gpio_pins[i].gp_pin == pin) + break; + } + + if (i >= sc->gpio_npins) + return (EINVAL); + + GPIO_LOCK(sc); + *flags = sc->gpio_pins[i].gp_flags; + GPIO_UNLOCK(sc); + + return (0); +} + +static int +imx51_gpio_pin_getname(device_t dev, uint32_t pin, char *name) +{ + struct imx51_gpio_softc *sc; + int i; + + sc = device_get_softc(dev); + for (i = 0; i < sc->gpio_npins; i++) { + if (sc->gpio_pins[i].gp_pin == pin) + break; + } + + if (i >= sc->gpio_npins) + return (EINVAL); + + GPIO_LOCK(sc); + memcpy(name, sc->gpio_pins[i].gp_name, GPIOMAXNAME); + GPIO_UNLOCK(sc); + + return (0); +} + +static int +imx51_gpio_pin_setflags(device_t dev, uint32_t pin, uint32_t flags) +{ + struct imx51_gpio_softc *sc; + int i; + + sc = device_get_softc(dev); + for (i = 0; i < sc->gpio_npins; i++) { + if (sc->gpio_pins[i].gp_pin == pin) + break; + } + + if (i >= sc->gpio_npins) + return (EINVAL); + + /* Check for unwanted flags. */ + if ((flags & sc->gpio_pins[i].gp_caps) != flags) + return (EINVAL); + + /* Can't mix input/output together */ + if ((flags & (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) == + (GPIO_PIN_INPUT|GPIO_PIN_OUTPUT)) + return (EINVAL); + + imx51_gpio_pin_configure(sc, &sc->gpio_pins[i], flags); + + + return (0); +} + +static int +imx51_gpio_pin_set(device_t dev, uint32_t pin, unsigned int value) +{ + struct imx51_gpio_softc *sc; + int i; + + sc = device_get_softc(dev); + for (i = 0; i < sc->gpio_npins; i++) { + if (sc->gpio_pins[i].gp_pin == pin) + break; + } + + if (i >= sc->gpio_npins) + return (EINVAL); + + GPIO_LOCK(sc); + if (value) + SET4(sc, IMX_GPIO_DR_REG, (1 << i)); + else + CLEAR4(sc, IMX_GPIO_DR_REG, (1 << i)); + GPIO_UNLOCK(sc); + + return (0); +} + +static int +imx51_gpio_pin_get(device_t dev, uint32_t pin, unsigned int *val) +{ + struct imx51_gpio_softc *sc; + int i; + + sc = device_get_softc(dev); + for (i = 0; i < sc->gpio_npins; i++) { + if (sc->gpio_pins[i].gp_pin == pin) + break; + } + + if (i >= sc->gpio_npins) + return (EINVAL); + + GPIO_LOCK(sc); + *val = (READ4(sc, IMX_GPIO_DR_REG) >> i) & 1; + GPIO_UNLOCK(sc); + + return (0); +} + +static int +imx51_gpio_pin_toggle(device_t dev, uint32_t pin) +{ + struct imx51_gpio_softc *sc; + int i; + + sc = device_get_softc(dev); + for (i = 0; i < sc->gpio_npins; i++) { + if (sc->gpio_pins[i].gp_pin == pin) + break; + } + + if (i >= sc->gpio_npins) + return (EINVAL); + + GPIO_LOCK(sc); + WRITE4(sc, IMX_GPIO_DR_REG, + (READ4(sc, IMX_GPIO_DR_REG) ^ (1 << i))); + GPIO_UNLOCK(sc); + + return (0); +} + +static int +imx51_gpio_intr(void *arg) +{ + struct imx51_gpio_softc *sc; + uint32_t input, value; + + sc = arg; + input = READ4(sc, IMX_GPIO_ISR_REG); + value = input & READ4(sc, IMX_GPIO_IMR_REG); + WRITE4(sc, IMX_GPIO_ISR_REG, input); + + if (!value) + goto intr_done; + + /* TODO: interrupt handling */ + +intr_done: + return (FILTER_HANDLED); +} + +static int +imx51_gpio_probe(device_t dev) +{ + + if (!ofw_bus_status_okay(dev)) + return (ENXIO); + + if (ofw_bus_search_compatible(dev, compat_data)->ocd_data != 0) { + device_set_desc(dev, "Freescale i.MX GPIO Controller"); + return (BUS_PROBE_DEFAULT); + } + + return (ENXIO); +} + +static int +imx51_gpio_attach(device_t dev) +{ + struct imx51_gpio_softc *sc; + int i, irq; + + sc = device_get_softc(dev); + mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_DEF); + + if (bus_alloc_resources(dev, imx_gpio_spec, sc->sc_res)) { + device_printf(dev, "could not allocate resources\n"); + return (ENXIO); + } + + sc->dev = dev; + sc->gpio_npins = NGPIO; + sc->sc_l_irq = 2; + sc->sc_iot = rman_get_bustag(sc->sc_res[0]); + sc->sc_ioh = rman_get_bushandle(sc->sc_res[0]); + + if (bus_alloc_resources(dev, imx_gpio0irq_spec, &sc->sc_res[3]) == 0) { + /* + * First GPIO unit able to serve +8 interrupts for 8 first + * pins. + */ + sc->sc_l_irq = 10; + } + + for (irq = 1; irq <= sc->sc_l_irq; irq ++) { + if ((bus_setup_intr(dev, sc->sc_res[irq], INTR_TYPE_MISC, + imx51_gpio_intr, NULL, sc, &sc->gpio_ih[irq]))) { + device_printf(dev, + "WARNING: unable to register interrupt handler\n"); + return (ENXIO); + } + } + + for (i = 0; i < sc->gpio_npins; i++) { + sc->gpio_pins[i].gp_pin = i; + sc->gpio_pins[i].gp_caps = DEFAULT_CAPS; + sc->gpio_pins[i].gp_flags = + (READ4(sc, IMX_GPIO_OE_REG) & (1 << i)) ? GPIO_PIN_OUTPUT: + GPIO_PIN_INPUT; + snprintf(sc->gpio_pins[i].gp_name, GPIOMAXNAME, + "imx_gpio%d.%d", device_get_unit(dev), i); + } + + device_add_child(dev, "gpioc", device_get_unit(dev)); + device_add_child(dev, "gpiobus", device_get_unit(dev)); + + return (bus_generic_attach(dev)); +} + +static int +imx51_gpio_detach(device_t dev) +{ + struct imx51_gpio_softc *sc; + + sc = device_get_softc(dev); + + KASSERT(mtx_initialized(&sc->sc_mtx), ("gpio mutex not initialized")); + + bus_generic_detach(dev); + + if (sc->sc_res[3]) + bus_release_resources(dev, imx_gpio0irq_spec, &sc->sc_res[3]); + + if (sc->sc_res[0]) + bus_release_resources(dev, imx_gpio_spec, sc->sc_res); + + mtx_destroy(&sc->sc_mtx); + + return(0); +} + +static device_method_t imx51_gpio_methods[] = { + DEVMETHOD(device_probe, imx51_gpio_probe), + DEVMETHOD(device_attach, imx51_gpio_attach), + DEVMETHOD(device_detach, imx51_gpio_detach), + + /* GPIO protocol */ + DEVMETHOD(gpio_pin_max, imx51_gpio_pin_max), + DEVMETHOD(gpio_pin_getname, imx51_gpio_pin_getname), + DEVMETHOD(gpio_pin_getflags, imx51_gpio_pin_getflags), + DEVMETHOD(gpio_pin_getcaps, imx51_gpio_pin_getcaps), + DEVMETHOD(gpio_pin_setflags, imx51_gpio_pin_setflags), + DEVMETHOD(gpio_pin_get, imx51_gpio_pin_get), + DEVMETHOD(gpio_pin_set, imx51_gpio_pin_set), + DEVMETHOD(gpio_pin_toggle, imx51_gpio_pin_toggle), + {0, 0}, +}; + +static driver_t imx51_gpio_driver = { + "gpio", + imx51_gpio_methods, + sizeof(struct imx51_gpio_softc), +}; +static devclass_t imx51_gpio_devclass; + +DRIVER_MODULE(imx51_gpio, simplebus, imx51_gpio_driver, imx51_gpio_devclass, + 0, 0); Modified: stable/10/sys/boot/fdt/dts/arm/imx6.dtsi ============================================================================== --- stable/10/sys/boot/fdt/dts/arm/imx6.dtsi Sun Oct 26 02:27:10 2014 (r273660) +++ stable/10/sys/boot/fdt/dts/arm/imx6.dtsi Sun Oct 26 02:37:42 2014 (r273661) @@ -102,6 +102,20 @@ interrupts = <119 120>; }; + /* System Reset Controller */ + src: src@4006E000 { + compatible = "fsl,imx6-src"; + reg = <0x020D8000 0x100>; + }; + + sdma: sdma@020ec000 { + compatible = "fsl,imx6q-sdma"; + reg = <0x020ec000 0x4000>; + interrupt-parent = <&gic>; + interrupts = <34>; + status = "disabled"; + }; + anatop: anatop@020c8000 { compatible = "fsl,imx6q-anatop"; reg = <0x020c8000 0x1000>; @@ -115,87 +129,95 @@ interrupt-parent = <&gic>; interrupts = <87>; }; -// iomux@73fa8000 { -// compatible = "fsl,imx51-iomux"; -// reg = <0x73fa8000 0x4000>; -// interrupt-parent = <&gic>; interrupts = <7>; -// status = "disabled"; -// }; + iomux@020e0000 { + compatible = "fsl,imx6q-iomux"; + reg = <0x020e0000 0x4000>; + interrupt-parent = <&gic>; + interrupts = <32>; + status = "disabled"; + }; gpio1: gpio@0209c000 { compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; reg = <0x0209c000 0x4000>; - interrupts = <0 66 0x04 0 67 0x04>; + interrupts = < 98 99 >; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + status = "disabled"; }; - + gpio2: gpio@020a0000 { compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; reg = <0x020a0000 0x4000>; - interrupts = <0 68 0x04 0 69 0x04>; + interrupts = < 100 101 >; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + status = "disabled"; }; - + gpio3: gpio@020a4000 { compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; reg = <0x020a4000 0x4000>; - interrupts = <0 70 0x04 0 71 0x04>; + interrupts = < 102 103 >; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + status = "disabled"; }; - + gpio4: gpio@020a8000 { compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; reg = <0x020a8000 0x4000>; - interrupts = <0 72 0x04 0 73 0x04>; + interrupts = < 104 105 >; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + status = "disabled"; }; - + gpio5: gpio@020ac000 { compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; reg = <0x020ac000 0x4000>; - interrupts = <0 74 0x04 0 75 0x04>; + interrupts = < 106 107 >; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + status = "disabled"; }; - + gpio6: gpio@020b0000 { compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; reg = <0x020b0000 0x4000>; - interrupts = <0 76 0x04 0 77 0x04>; + interrupts = < 108 109 >; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + status = "disabled"; }; - + gpio7: gpio@020b4000 { compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio"; reg = <0x020b4000 0x4000>; - interrupts = <0 78 0x04 0 79 0x04>; + interrupts = < 110 111 >; gpio-controller; #gpio-cells = <2>; interrupt-controller; #interrupt-cells = <2>; + status = "disabled"; }; uart1: serial@02020000 { compatible = "fsl,imx6q-uart"; reg = <0x02020000 0x4000>; - interrupt-parent = <&gic>; + interrupt-parent = <&gic>; interrupts = <58>; clock-frequency = <80000000>; status = "disabled"; @@ -204,7 +226,7 @@ uart2: serial@021e8000 { compatible = "fsl,imx6q-uart"; reg = <0x021e8000 0x4000>; - interrupt-parent = <&gic>; + interrupt-parent = <&gic>; interrupts = <59>; clock-frequency = <80000000>; status = "disabled"; @@ -213,7 +235,7 @@ uart3: serial@021ec000 { compatible = "fsl,imx6q-uart"; reg = <0x021ec000 0x4000>; - interrupt-parent = <&gic>; + interrupt-parent = <&gic>; interrupts = <60>; clock-frequency = <80000000>; status = "disabled"; @@ -222,7 +244,7 @@ uart4: serial@021f0000 { compatible = "fsl,imx6q-uart"; reg = <0x021f0000 0x4000>; - interrupt-parent = <&gic>; + interrupt-parent = <&gic>; interrupts = <61>; clock-frequency = <80000000>; status = "disabled"; @@ -231,7 +253,7 @@ uart5: serial@021f4000 { compatible = "fsl,imx6q-uart"; reg = <0x021f4000 0x4000>; - interrupt-parent = <&gic>; + interrupt-parent = <&gic>; interrupts = <62>; clock-frequency = <80000000>; status = "disabled"; @@ -243,14 +265,69 @@ interrupts = <44>; status = "disabled"; }; - + usbphy2: usbphy@020ca000 { compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy"; reg = <0x020ca000 0x1000>; interrupts = <45>; status = "disabled"; }; - + + ecspi1: ecspi@02008000 { + compatible = "fsl,imx6q-ecspi"; + reg = <0x02008000 0x4000>; + interrupts = < 63 >; + status = "disabled"; + }; + + ecspi2: ecspi@0200C000 { + compatible = "fsl,imx6q-ecspi"; + reg = <0x0200C000 0x4000>; + interrupts = < 64 >; + status = "disabled"; + }; + + ecspi3: ecspi@02010000 { + compatible = "fsl,imx6q-ecspi"; + reg = <0x02010000 0x4000>; + interrupts = < 65 >; + status = "disabled"; + }; + + ecspi4: ecspi@02014000 { + compatible = "fsl,imx6q-ecspi"; + reg = <0x02014000 0x4000>; + interrupts = < 66 >; + status = "disabled"; + }; + + ecspi5: ecspi@02018000 { + compatible = "fsl,imx6q-ecspi"; + reg = <0x02018000 0x4000>; + interrupts = < 67 >; + status = "disabled"; + }; + + ssi1: ssi@02028000 { + compatible = "fsl,imx6q-ssi"; + reg = <0x02028000 0x4000>; + interrupts = < 78 >; + status = "disabled"; + }; + + ssi2: ssi@0202C000 { + compatible = "fsl,imx6q-ssi"; + reg = <0x0202C000 0x4000>; + interrupts = < 79 >; + status = "disabled"; + }; + + ssi3: ssi@02030000 { + compatible = "fsl,imx6q-ssi"; + reg = <0x02030000 0x4000>; + interrupts = < 80 >; + status = "disabled"; + }; }; aips@02100000 { /* AIPS2 */ @@ -267,7 +344,7 @@ interrupts = <150 151>; status = "disabled"; }; - + usbotg1: usb@02184000 { compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; reg = <0x02184000 0x200>; @@ -276,7 +353,7 @@ fsl,usbmisc = <&usbmisc 0>; status = "disabled"; }; - + usbh1: usb@02184200 { compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; reg = <0x02184200 0x200>; @@ -285,7 +362,7 @@ fsl,usbmisc = <&usbmisc 1>; status = "disabled"; }; - + usbh2: usb@02184400 { compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; reg = <0x02184400 0x200>; @@ -293,7 +370,7 @@ fsl,usbmisc = <&usbmisc 2>; status = "disabled"; }; - + usbh3: usb@02184600 { compatible = "fsl,imx6q-usb", "fsl,imx27-usb"; reg = <0x02184600 0x200>; @@ -301,7 +378,7 @@ fsl,usbmisc = <&usbmisc 3>; status = "disabled"; }; - + usbmisc: usbmisc@02184800 { #index-cells = <1>; compatible = "fsl,imx6q-usbmisc"; @@ -352,6 +429,12 @@ compatible = "fsl,imx6q-ocotp"; reg = <0x021bc000 0x4000>; }; + + audmux: audmux@021d8000 { + compatible = "fsl,imx6q-audmux"; + reg = <0x021d8000 0x4000>; + status = "disabled"; + }; }; }; }; Modified: stable/10/sys/boot/fdt/dts/arm/wandboard-dual.dts ============================================================================== --- stable/10/sys/boot/fdt/dts/arm/wandboard-dual.dts Sun Oct 26 02:27:10 2014 (r273660) +++ stable/10/sys/boot/fdt/dts/arm/wandboard-dual.dts Sun Oct 26 02:37:42 2014 (r273661) @@ -44,11 +44,14 @@ SOC: soc@00000000 { aips@02000000 { /* AIPS1 */ -// iomux@73fa8000 { status = "disabled"; }; -// gpio@0209C000 { status = "disabled"; }; -// gpio@020A0000 { status = "disabled"; }; -// gpio@020A4000 { status = "disabled"; }; -// gpio@020A8000 { status = "disabled"; }; + iomux@020e0000 { status = "disabled"; }; + gpio@0209c000 { status = "okay"; }; + gpio@020a0000 { status = "okay"; }; + gpio@020a4000 { status = "okay"; }; + gpio@020a8000 { status = "okay"; }; + gpio@020aC000 { status = "okay"; }; + gpio@020b0000 { status = "okay"; }; + gpio@020b4000 { status = "okay"; }; console:serial@02020000 { status = "okay"; }; serial@021e8000 { status = "disabled"; }; serial@021ec000 { status = "disabled"; }; @@ -58,7 +61,7 @@ usbphy@020ca000 { status = "okay"; }; }; aips@02100000 { /* AIPS2 */ - ethernet@02188000 { + ethernet@02188000 { status = "okay"; phy-mode = "rgmii"; phy-disable-preamble; Modified: stable/10/sys/boot/fdt/dts/arm/wandboard-quad.dts ============================================================================== --- stable/10/sys/boot/fdt/dts/arm/wandboard-quad.dts Sun Oct 26 02:27:10 2014 (r273660) +++ stable/10/sys/boot/fdt/dts/arm/wandboard-quad.dts Sun Oct 26 02:37:42 2014 (r273661) @@ -44,11 +44,14 @@ SOC: soc@00000000 { aips@02000000 { /* AIPS1 */ -// iomux@73fa8000 { status = "disabled"; }; -// gpio@0209C000 { status = "disabled"; }; -// gpio@020A0000 { status = "disabled"; }; -// gpio@020A4000 { status = "disabled"; }; -// gpio@020A8000 { status = "disabled"; }; + iomux@020e0000 { status = "disabled"; }; + gpio@0209c000 { status = "okay"; }; + gpio@020a0000 { status = "okay"; }; + gpio@020a4000 { status = "okay"; }; + gpio@020a8000 { status = "okay"; }; + gpio@020aC000 { status = "okay"; }; + gpio@020b0000 { status = "okay"; }; + gpio@020b4000 { status = "okay"; }; console:serial@02020000 { status = "okay"; }; serial@021e8000 { status = "disabled"; }; serial@021ec000 { status = "disabled"; }; @@ -58,7 +61,7 @@ usbphy@020ca000 { status = "okay"; }; }; aips@02100000 { /* AIPS2 */ - ethernet@02188000 { + ethernet@02188000 { status = "okay"; phy-mode = "rgmii"; phy-disable-preamble; Modified: stable/10/sys/boot/fdt/dts/arm/wandboard-solo.dts ============================================================================== --- stable/10/sys/boot/fdt/dts/arm/wandboard-solo.dts Sun Oct 26 02:27:10 2014 (r273660) +++ stable/10/sys/boot/fdt/dts/arm/wandboard-solo.dts Sun Oct 26 02:37:42 2014 (r273661) @@ -44,11 +44,14 @@ SOC: soc@00000000 { aips@02000000 { /* AIPS1 */ -// iomux@73fa8000 { status = "disabled"; }; -// gpio@0209C000 { status = "disabled"; }; -// gpio@020A0000 { status = "disabled"; }; -// gpio@020A4000 { status = "disabled"; }; -// gpio@020A8000 { status = "disabled"; }; + iomux@020e0000 { status = "disabled"; }; + gpio@0209c000 { status = "okay"; }; + gpio@020a0000 { status = "okay"; }; + gpio@020a4000 { status = "okay"; }; + gpio@020a8000 { status = "okay"; }; + gpio@020aC000 { status = "okay"; }; + gpio@020b0000 { status = "okay"; }; + gpio@020b4000 { status = "okay"; }; console:serial@02020000 { status = "okay"; }; serial@021e8000 { status = "disabled"; }; serial@021ec000 { status = "disabled"; }; @@ -58,7 +61,7 @@ usbphy@020ca000 { status = "okay"; }; }; aips@02100000 { /* AIPS2 */ - ethernet@02188000 { + ethernet@02188000 { status = "okay"; phy-mode = "rgmii"; phy-disable-preamble;
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