Date: Thu, 14 Oct 2010 21:34:53 +0000 (UTC) From: Marius Strobl <marius@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r213868 - head/sys/sparc64/sparc64 Message-ID: <201010142134.o9ELYrXE038441@svn.freebsd.org>
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Author: marius Date: Thu Oct 14 21:34:53 2010 New Revision: 213868 URL: http://svn.freebsd.org/changeset/base/213868 Log: - In the spirit of r212559 add a comment describing what will eventually lower the PIL. - Just as with the AP ensure that the (S)TICK timer(s) are in a known state when starting BSPs. Modified: head/sys/sparc64/sparc64/mp_machdep.c Modified: head/sys/sparc64/sparc64/mp_machdep.c ============================================================================== --- head/sys/sparc64/sparc64/mp_machdep.c Thu Oct 14 21:30:13 2010 (r213867) +++ head/sys/sparc64/sparc64/mp_machdep.c Thu Oct 14 21:34:53 2010 (r213868) @@ -433,6 +433,12 @@ cpu_mp_bootstrap(struct pcpu *pc) */ cache_enable(pc->pc_impl); + /* + * Clear (S)TICK timer(s) (including NPT) and ensure they are stopped. + */ + tick_clear(pc->pc_impl); + tick_stop(pc->pc_impl); + /* Lock the kernel TSB in the TLB. */ pmap_map_tsb(); @@ -445,7 +451,11 @@ cpu_mp_bootstrap(struct pcpu *pc) /* Initialize global registers. */ cpu_setregs(pc); - /* Enable interrupts. */ + /* + * Enable interrupts. + * Note that the PIL we be lowered indirectly via sched_throw(NULL) + * when fake spinlock held by the idle thread eventually is released. + */ wrpr(pstate, 0, PSTATE_KERNEL); smp_cpus++;
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