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Date:      Thu, 05 Feb 2026 03:43:35 +0000
From:      Justin Hibbits <jhibbits@FreeBSD.org>
To:        src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org
Subject:   git: c1a339b4a313 - main - powerpc64/pmap: No need to use r0 anymore in tlbie
Message-ID:  <698411e7.44bb3.7b40fde6@gitrepo.freebsd.org>

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The branch main has been updated by jhibbits:

URL: https://cgit.FreeBSD.org/src/commit/?id=c1a339b4a313ead4122c630ab9ac8f9c54c3e0a2

commit c1a339b4a313ead4122c630ab9ac8f9c54c3e0a2
Author:     Justin Hibbits <jhibbits@FreeBSD.org>
AuthorDate: 2026-02-05 03:28:16 +0000
Commit:     Justin Hibbits <jhibbits@FreeBSD.org>
CommitDate: 2026-02-05 03:42:23 +0000

    powerpc64/pmap: No need to use r0 anymore in tlbie
    
    The only use of `tlbie %rN, 0` is now explicit and covered in the block
    above.  Since there's no need for an explicit `tlbie %rN, 0` now, drop
    this convoluted piece and let the compiler decide.
    
    While here, a trivial optimization of the old-style tlbie block, by
    clearing tlbie_lock and returning, instead of going to the end which
    checks again if the lock is needed.  Since it's already known to be
    needed, there's no need to check again.
---
 sys/powerpc/aim/moea64_native.c | 17 +++--------------
 1 file changed, 3 insertions(+), 14 deletions(-)

diff --git a/sys/powerpc/aim/moea64_native.c b/sys/powerpc/aim/moea64_native.c
index 0ea44b1097b6..7714187c2f4d 100644
--- a/sys/powerpc/aim/moea64_native.c
+++ b/sys/powerpc/aim/moea64_native.c
@@ -183,7 +183,8 @@ TLBIE(uint64_t vpn, uint64_t oldptehi)
 				    "memory");
 			__asm __volatile("eieio; tlbsync; ptesync" :::
 			    "memory");
-			goto done;
+			tlbie_lock = 0;
+			return;
 #endif
 		}
 	}
@@ -197,20 +198,8 @@ TLBIE(uint64_t vpn, uint64_t oldptehi)
 	    (oldptehi & LPTE_KERNEL_VSID_BIT) == 0)
 		vpn |= AP_16M;
 
-	/*
-	 * Explicitly clobber r0.  The tlbie instruction has two forms: an old
-	 * one used by PowerISA 2.03 and prior, and a newer one used by PowerISA
-	 * 2.06 (maybe 2.05?) and later.  We need to support both, and it just
-	 * so happens that since we use 4k pages we can simply zero out r0, and
-	 * clobber it, and the assembler will interpret the single-operand form
-	 * of tlbie as having RB set, and everything else as 0.  The RS operand
-	 * in the newer form is in the same position as the L(page size) bit of
-	 * the old form, so a slong as RS is 0, we're good on both sides.
-	 */
-	__asm __volatile("li 0, 0 \n tlbie %0, 0" :: "r"(vpn) : "r0", "memory");
+	__asm __volatile("tlbie %0, %1" :: "r"(vpn), "r"(0) : "memory");
 	__asm __volatile("eieio; tlbsync; ptesync" ::: "memory");
-done:
-
 #else
 	vpn_hi = (uint32_t)(vpn >> 32);
 	vpn_lo = (uint32_t)vpn;


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