Date: Sun, 20 Feb 2005 22:22:15 GMT From: Olivier Houchard <cognet@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 71419 for review Message-ID: <200502202222.j1KMMFq0067178@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=71419 Change 71419 by cognet@cognet on 2005/02/20 22:21:20 Convert sa11x0 specific code to the new irq api. Affected files ... .. //depot/projects/arm/src/sys/arm/sa11x0/sa11x0_irqhandler.c#2 edit Differences ... ==== //depot/projects/arm/src/sys/arm/sa11x0/sa11x0_irqhandler.c#2 (text+ko) ==== @@ -102,20 +102,24 @@ extern struct sa11x0_softc *sa11x0_softc; +static uint32_t sa11x0_irq_mask = 0xfffffff; + /* Recalculate the interrupt masks from scratch. * We could code special registry and deregistry versions of this function that * would be faster, but the code would be nastier, and we don't expect this to * happen very much anyway. */ int -arm_get_irqnb(void *frame) +arm_get_next_irq() { - struct sa11x0_softc *sc = sa11x0_softc; + int irq; - return(bus_space_read_4(sc->sc_iot, sc->sc_ioh, SAIPIC_IP)); + if ((irq = (bus_space_read_4(sc->sc_iot, sc->sc_ioh, SAIPIC_IP) & + sa11x0_irq_mask)) != 0) + return (ffs(irq) - 1); + return (-1); } -static uint32_t sa11x0_irq_mask = 0xfffffff; extern vm_offset_t saipic_base; @@ -123,7 +127,7 @@ arm_mask_irqs(int irq) { - sa11x0_irq_mask &= ~irq; + sa11x0_irq_mask &= ~(1 << irq); __asm __volatile("str %0, [%1, #0x04]" /* SAIPIC_MR */ : : "r" (sa11x0_irq_mask), "r" (saipic_base)); } @@ -132,7 +136,7 @@ arm_unmask_irqs(int irq) { - sa11x0_irq_mask |= irq; + sa11x0_irq_mask |= (1 << irq); __asm __volatile("str %0, [%1, #0x04]" /* SAIPIC_MR */ : : "r" (sa11x0_irq_mask), "r" (saipic_base)); }
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