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Date:      Wed, 22 Dec 2021 10:06:18 GMT
From:      Dimitry Andric <dim@FreeBSD.org>
To:        src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org
Subject:   git: 17dcdca63fb6 - stable/12 - Merge commit 46673763f from llvm git (by Craig Topper):
Message-ID:  <202112221006.1BMA6IRH092509@gitrepo.freebsd.org>

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The branch stable/12 has been updated by dim:

URL: https://cgit.FreeBSD.org/src/commit/?id=17dcdca63fb6cb09a543fc448da74341ceb8ef94

commit 17dcdca63fb6cb09a543fc448da74341ceb8ef94
Author:     Dimitry Andric <dim@FreeBSD.org>
AuthorDate: 2020-09-17 19:47:41 +0000
Commit:     Dimitry Andric <dim@FreeBSD.org>
CommitDate: 2021-12-22 10:01:18 +0000

    Merge commit 46673763f from llvm git (by Craig Topper):
    
      [X86] Place new constant node in topological order in
      X86DAGToDAGISel::matchBitExtract
    
      Fixes PR47482
    
    This should fix 'Assertion failed: (Op->getNodeId() != -1 && "Node has
    already selected predecessor node"), function DoInstructionSelection,
    file
    /usr/src/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp,
    line 1149' when compiling part of the project_painter project, while
    targeting the bdver2 (or higher) CPU.
    
    Reported by:    jkim
    MFC after:      6 weeks
    X-MFC-With:     r364284
    
    (cherry picked from commit 82bf979d530ecad0bc43231a77d9f1a67df53f11)
---
 contrib/llvm-project/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 1 +
 1 file changed, 1 insertion(+)

diff --git a/contrib/llvm-project/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp b/contrib/llvm-project/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
index 3cd80cb04ab8..4768c5aa543d 100644
--- a/contrib/llvm-project/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/contrib/llvm-project/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -3496,6 +3496,7 @@ bool X86DAGToDAGISel::matchBitExtract(SDNode *Node) {
   // Shift NBits left by 8 bits, thus producing 'control'.
   // This makes the low 8 bits to be zero.
   SDValue C8 = CurDAG->getConstant(8, DL, MVT::i8);
+  insertDAGNode(*CurDAG, SDValue(Node, 0), C8);
   SDValue Control = CurDAG->getNode(ISD::SHL, DL, MVT::i32, NBits, C8);
   insertDAGNode(*CurDAG, SDValue(Node, 0), Control);
 



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