Date: Thu, 11 Aug 2022 14:53:09 GMT From: Mitchell Horne <mhorne@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org Subject: git: 104d385fed2e - stable/12 - if_dwc: Split init code into sub function Message-ID: <202208111453.27BEr958032328@gitrepo.freebsd.org>
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The branch stable/12 has been updated by mhorne: URL: https://cgit.FreeBSD.org/src/commit/?id=104d385fed2e2959dbae8b7a8ddbcae7f28c95f0 commit 104d385fed2e2959dbae8b7a8ddbcae7f28c95f0 Author: Emmanuel Vadot <manu@FreeBSD.org> AuthorDate: 2020-11-20 11:26:46 +0000 Commit: Mitchell Horne <mhorne@FreeBSD.org> CommitDate: 2022-08-11 14:52:02 +0000 if_dwc: Split init code into sub function Be clear of what we enable or init. No functional changes intended (cherry picked from commit 158ce7ba0ed04fc65f6f09381ab924f10b7e96a0) --- sys/dev/dwc/if_dwc.c | 61 ++++++++++++++++++++++++++++++++++------------------ 1 file changed, 40 insertions(+), 21 deletions(-) diff --git a/sys/dev/dwc/if_dwc.c b/sys/dev/dwc/if_dwc.c index 0b38439b3e12..6c15bf9e71df 100644 --- a/sys/dev/dwc/if_dwc.c +++ b/sys/dev/dwc/if_dwc.c @@ -211,6 +211,8 @@ static void dwc_txfinish_locked(struct dwc_softc *sc); static void dwc_rxfinish_locked(struct dwc_softc *sc); static void dwc_stop_locked(struct dwc_softc *sc); static void dwc_setup_rxfilter(struct dwc_softc *sc); +static void dwc_setup_core(struct dwc_softc *sc); +static void dwc_init_dma(struct dwc_softc *sc); static inline uint32_t next_rxidx(struct dwc_softc *sc, uint32_t curidx) @@ -473,7 +475,6 @@ static void dwc_init_locked(struct dwc_softc *sc) { struct ifnet *ifp = sc->ifp; - uint32_t reg; DWC_ASSERT_LOCKED(sc); @@ -483,26 +484,8 @@ dwc_init_locked(struct dwc_softc *sc) ifp->if_drv_flags |= IFF_DRV_RUNNING; dwc_setup_rxfilter(sc); - - /* Initializa DMA and enable transmitters */ - reg = READ4(sc, OPERATION_MODE); - reg |= (MODE_TSF | MODE_OSF | MODE_FUF); - reg &= ~(MODE_RSF); - reg |= (MODE_RTC_LEV32 << MODE_RTC_SHIFT); - WRITE4(sc, OPERATION_MODE, reg); - - WRITE4(sc, INTERRUPT_ENABLE, INT_EN_DEFAULT); - - /* Start DMA */ - reg = READ4(sc, OPERATION_MODE); - reg |= (MODE_ST | MODE_SR); - WRITE4(sc, OPERATION_MODE, reg); - - /* Enable transmitters */ - reg = READ4(sc, MAC_CONFIGURATION); - reg |= (CONF_JD | CONF_ACS | CONF_BE); - reg |= (CONF_TE | CONF_RE); - WRITE4(sc, MAC_CONFIGURATION, reg); + dwc_setup_core(sc); + dwc_init_dma(sc); /* * Call mii_mediachg() which will call back into dwc_miibus_statchg() @@ -788,6 +771,42 @@ dwc_setup_rxfilter(struct dwc_softc *sc) } } +static void +dwc_setup_core(struct dwc_softc *sc) +{ + uint32_t reg; + + DWC_ASSERT_LOCKED(sc); + + /* Enable transmitters */ + reg = READ4(sc, MAC_CONFIGURATION); + reg |= (CONF_JD | CONF_ACS | CONF_BE); + reg |= (CONF_TE | CONF_RE); + WRITE4(sc, MAC_CONFIGURATION, reg); +} + +static void +dwc_init_dma(struct dwc_softc *sc) +{ + uint32_t reg; + + DWC_ASSERT_LOCKED(sc); + + /* Initializa DMA and enable transmitters */ + reg = READ4(sc, OPERATION_MODE); + reg |= (MODE_TSF | MODE_OSF | MODE_FUF); + reg &= ~(MODE_RSF); + reg |= (MODE_RTC_LEV32 << MODE_RTC_SHIFT); + WRITE4(sc, OPERATION_MODE, reg); + + WRITE4(sc, INTERRUPT_ENABLE, INT_EN_DEFAULT); + + /* Start DMA */ + reg = READ4(sc, OPERATION_MODE); + reg |= (MODE_ST | MODE_SR); + WRITE4(sc, OPERATION_MODE, reg); +} + static int dwc_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) {
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