Date: Fri, 14 Jul 2000 12:29:04 -0700 (PDT) From: wpaul@FreeBSD.ORG (Bill Paul) To: bleez@bellatlantic.net (Bryan Liesner) Cc: grog@lemis.com, freebsd-stable@freebsd.org Subject: Re: RX problems with Macronix ethernet cards Message-ID: <20000714192905.1C0F837CAF0@hub.freebsd.org> In-Reply-To: <Pine.BSF.4.21.0007132118120.190-200000@adsl-151-197-209-20.bellatlantic.net> from Bryan Liesner at "Jul 13, 2000 09:33:26 pm"
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Ok, based in the info I've received, I've generated a patch for if_dc.c
and if_dcreg.h, which I'm including with this e-mail. It should work on
both -current and -stable, possibly with a little noise on -stable.
I added flags to select the hash table width and a check for the
MX98715AEC-C and later chip revs. Please test this patch and let me know
how it works (or fails to work, as the case may be).
To apply the patch:
- Save this mail to /tmp/mx.patch
- Become root
- Go to /sys/pci
- Type: patch < /tmp/mx.patch
- Make a new kernel and/or if_dc.ko module.
-Bill
*** if_dc.c.orig Fri Jul 14 12:16:20 2000
--- if_dc.c Thu Jul 13 22:18:30 2000
***************
*** 184,189 ****
--- 184,191 ----
{ DC_VENDORID_MX, DC_DEVICEID_987x5,
"Macronix 98715/98715A 10/100BaseTX" },
{ DC_VENDORID_MX, DC_DEVICEID_987x5,
+ "Macronix 98715AEC-C 10/100BaseTX" },
+ { DC_VENDORID_MX, DC_DEVICEID_987x5,
"Macronix 98725 10/100BaseTX" },
{ DC_VENDORID_LO, DC_DEVICEID_82C115,
"LC82C115 PNIC II 10/100BaseTX" },
***************
*** 899,906 ****
}
#define DC_POLY 0xEDB88320
! #define DC_BITS 9
! #define DC_BITS_PNIC_II 7
static u_int32_t dc_crc_le(sc, addr)
struct dc_softc *sc;
--- 901,909 ----
}
#define DC_POLY 0xEDB88320
! #define DC_BITS_512 9
! #define DC_BITS_128 7
! #define DC_BITS_64 6
static u_int32_t dc_crc_le(sc, addr)
struct dc_softc *sc;
***************
*** 916,926 ****
crc = (crc >> 1) ^ (((crc ^ data) & 1) ? DC_POLY : 0);
}
! /* The hash table on the PNIC II is only 128 bits wide. */
! if (DC_IS_PNICII(sc))
! return (crc & ((1 << DC_BITS_PNIC_II) - 1));
! return (crc & ((1 << DC_BITS) - 1));
}
/*
--- 919,936 ----
crc = (crc >> 1) ^ (((crc ^ data) & 1) ? DC_POLY : 0);
}
! /*
! * The hash table on the PNIC II and the MX98715AEC-C/D/E
! * chips is only 128 bits wide.
! */
! if (sc->dc_flags & DC_128BIT_HASH)
! return (crc & ((1 << DC_BITS_128) - 1));
!
! /* The hash table on the MX98715BEC is only 64 bits wide. */
! if (sc->dc_flags & DC_64BIT_HASH)
! return (crc & ((1 << DC_BITS_64) - 1));
! return (crc & ((1 << DC_BITS_512) - 1));
}
/*
***************
*** 1345,1350 ****
--- 1355,1363 ----
rev >= DC_REVISION_98713A)
t++;
if (t->dc_did == DC_DEVICEID_987x5 &&
+ rev >= DC_REVISION_98715AEC_C)
+ t++;
+ if (t->dc_did == DC_DEVICEID_987x5 &&
rev >= DC_REVISION_98725)
t++;
if (t->dc_did == DC_DEVICEID_AX88140A &&
***************
*** 1552,1564 ****
break;
case DC_DEVICEID_987x5:
case DC_DEVICEID_EN1217:
sc->dc_type = DC_TYPE_987x5;
sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY;
break;
case DC_DEVICEID_82C115:
sc->dc_type = DC_TYPE_PNICII;
! sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY;
break;
case DC_DEVICEID_82C168:
--- 1565,1587 ----
break;
case DC_DEVICEID_987x5:
case DC_DEVICEID_EN1217:
+ /*
+ * Macronix MX98715AEC-C/D/E parts have only a
+ * 128-bit hash table. We need to deal with these
+ * in the same manner as the PNIC II so that we
+ * get the right number of bits out of the
+ * CRC routine.
+ */
+ if (revision >= DC_REVISION_98715AEC_C &&
+ revision < DC_REVISION_98725)
+ sc->dc_flags |= DC_128BIT_HASH;
sc->dc_type = DC_TYPE_987x5;
sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR;
sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY;
break;
case DC_DEVICEID_82C115:
sc->dc_type = DC_TYPE_PNICII;
! sc->dc_flags |= DC_TX_POLL|DC_TX_USE_TX_INTR|DC_128BIT_HASH;
sc->dc_flags |= DC_REDUCED_MII_POLL|DC_21143_NWAY;
break;
case DC_DEVICEID_82C168:
*** if_dcreg.h.orig Fri Jul 14 12:16:20 2000
--- if_dcreg.h Thu Jul 13 22:03:05 2000
***************
*** 672,677 ****
--- 672,679 ----
#define DC_REDUCED_MII_POLL 0x00000200
#define DC_TX_INTR_ALWAYS 0x00000400
#define DC_21143_NWAY 0x00000800
+ #define DC_128BIT_HASH 0x00001000
+ #define DC_64BIT_HASH 0x00002000
/*
* register space access macros
***************
*** 714,719 ****
--- 716,722 ----
#define DC_REVISION_98713 0x00
#define DC_REVISION_98713A 0x10
#define DC_REVISION_98715 0x20
+ #define DC_REVISION_98715AEC_C 0x25
#define DC_REVISION_98725 0x30
/*
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