Date: Thu, 1 Mar 2018 14:11:08 +0000 (UTC) From: Wojciech Macek <wma@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r330240 - in head/sys: conf powerpc/conf powerpc/powernv Message-ID: <201803011411.w21EB87c087995@repo.freebsd.org>
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Author: wma Date: Thu Mar 1 14:11:07 2018 New Revision: 330240 URL: https://svnweb.freebsd.org/changeset/base/330240 Log: PowerNV: Initial support for OPAL I2C transfers Add I2C OPAL driver and a set of dummy-ones to allow all I2C things on Power8 to attach. TODO: better async token management Submitted by: Wojciech Macek <wma@semihalf.com> Obtained from: Semihalf Sponsored by: IBM, QCM Technologies Added: head/sys/powerpc/powernv/opal_i2c.c (contents, props changed) head/sys/powerpc/powernv/opal_i2cm.c (contents, props changed) head/sys/powerpc/powernv/powernv_centaur.c (contents, props changed) head/sys/powerpc/powernv/powernv_xscom.c (contents, props changed) Modified: head/sys/conf/files.powerpc head/sys/powerpc/conf/GENERIC64 head/sys/powerpc/powernv/opal.h Modified: head/sys/conf/files.powerpc ============================================================================== --- head/sys/conf/files.powerpc Thu Mar 1 13:52:18 2018 (r330239) +++ head/sys/conf/files.powerpc Thu Mar 1 14:11:07 2018 (r330240) @@ -186,9 +186,13 @@ powerpc/powermac/vcoregpio.c optional powermac powerpc/powernv/opal.c optional powernv powerpc/powernv/opal_console.c optional powernv powerpc/powernv/opal_dev.c optional powernv +powerpc/powernv/opal_i2c.c optional iicbus fdt powernv +powerpc/powernv/opal_i2cm.c optional iicbus fdt powernv powerpc/powernv/opal_pci.c optional powernv pci powerpc/powernv/opalcall.S optional powernv powerpc/powernv/platform_powernv.c optional powernv +powerpc/powernv/powernv_centaur.c optional powernv +powerpc/powernv/powernv_xscom.c optional powernv powerpc/powerpc/altivec.c optional powerpc | powerpc64 powerpc/powerpc/autoconf.c standard powerpc/powerpc/bcopy.c standard Modified: head/sys/powerpc/conf/GENERIC64 ============================================================================== --- head/sys/powerpc/conf/GENERIC64 Thu Mar 1 13:52:18 2018 (r330239) +++ head/sys/powerpc/conf/GENERIC64 Thu Mar 1 14:11:07 2018 (r330240) @@ -206,6 +206,7 @@ device fwe # Ethernet over FireWire (non-standard!) # Misc device iicbus # I2C bus code +device iic device kiic # Keywest I2C device ad7417 # PowerMac7,2 temperature sensor device ds1631 # PowerMac11,2 temperature sensor Modified: head/sys/powerpc/powernv/opal.h ============================================================================== --- head/sys/powerpc/powernv/opal.h Thu Mar 1 13:52:18 2018 (r330239) +++ head/sys/powerpc/powernv/opal.h Thu Mar 1 14:11:07 2018 (r330240) @@ -71,15 +71,37 @@ int opal_call(uint64_t token, ...); #define OPAL_PCI_MAP_PE_DMA_WINDOW_REAL 45 #define OPAL_RETURN_CPU 69 #define OPAL_REINIT_CPUS 70 +#define OPAL_CHECK_ASYNC_COMPLETION 86 +#define OPAL_I2C_REQUEST 109 #define OPAL_PCI_TCE_KILL 126 /* For OPAL_PCI_SET_PE */ #define OPAL_UNMAP_PE 0 #define OPAL_MAP_PE 1 -#define OPAL_SUCCESS 0 -#define OPAL_PARAMETER -1 -#define OPAL_CLOSED -5 +#define OPAL_SUCCESS 0 +#define OPAL_PARAMETER -1 +#define OPAL_BUSY -2 +#define OPAL_CLOSED -5 #define OPAL_BUSY_EVENT -12 +#define OPAL_ASYNC_COMPLETION -15 + +struct opal_msg { + uint32_t msg_type; + uint32_t reserved; + uint64_t params[8]; +}; + +enum opal_msg_type { + OPAL_MSG_ASYNC_COMP = 0, + OPAL_MSG_MEM_ERR = 1, + OPAL_MSG_EPOW = 2, + OPAL_MSG_SHUTDOWN = 3, + OPAL_MSG_HMI_EVT = 4, + OPAL_MSG_DPO = 5, + OPAL_MSG_PRD = 6, + OPAL_MSG_OCC = 7, + OPAL_MSG_TYPE_MAX, +}; #endif Added: head/sys/powerpc/powernv/opal_i2c.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/powerpc/powernv/opal_i2c.c Thu Mar 1 14:11:07 2018 (r330240) @@ -0,0 +1,252 @@ +/*- + * Copyright (c) 2017-2018 QCM Technologies. + * Copyright (c) 2017-2018 Semihalf. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#include "opt_platform.h" + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <sys/param.h> +#include <sys/endian.h> +#include <sys/systm.h> +#include <sys/bus.h> +#include <sys/conf.h> +#include <sys/kernel.h> +#include <sys/lock.h> +#include <sys/mbuf.h> +#include <sys/malloc.h> +#include <sys/module.h> +#include <sys/mutex.h> +#include <sys/rman.h> +#include <machine/bus.h> + +#include <vm/vm.h> +#include <vm/pmap.h> + +#include <dev/iicbus/iiconf.h> +#include <dev/iicbus/iicbus.h> +#include "iicbus_if.h" + +#include "opal.h" + +#ifdef FDT +#include <dev/ofw/ofw_bus.h> +#include <dev/ofw/ofw_bus_subr.h> +#endif + +struct opal_i2c_softc +{ + device_t dev; + device_t iicbus; + uint32_t opal_id; + struct mtx sc_mtx; +}; + +/* OPAL I2C request */ +struct opal_i2c_request { + uint8_t type; +#define OPAL_I2C_RAW_READ 0 +#define OPAL_I2C_RAW_WRITE 1 +#define OPAL_I2C_SM_READ 2 +#define OPAL_I2C_SM_WRITE 3 + uint8_t flags; + uint8_t subaddr_sz; /* Max 4 */ + uint8_t reserved; + uint16_t addr; /* 7 or 10 bit address */ + uint16_t reserved2; + uint32_t subaddr; /* Sub-address if any */ + uint32_t size; /* Data size */ + uint64_t buffer_pa; /* Buffer real address */ +}; + +static int opal_i2c_attach(device_t); +static int opal_i2c_callback(device_t, int, caddr_t); +static int opal_i2c_probe(device_t); +static int opal_i2c_transfer(device_t, struct iic_msg *, uint32_t); +static int i2c_opal_send_request(uint32_t, struct opal_i2c_request *); + +static device_method_t opal_i2c_methods[] = { + /* Device interface */ + DEVMETHOD(device_probe, opal_i2c_probe), + DEVMETHOD(device_attach, opal_i2c_attach), + + /* iicbus interface */ + DEVMETHOD(iicbus_callback, opal_i2c_callback), + DEVMETHOD(iicbus_transfer, opal_i2c_transfer), + DEVMETHOD_END +}; + +#define I2C_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) +#define I2C_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) +#define I2C_LOCK_INIT(_sc) \ + mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->dev), \ + "i2c", MTX_DEF) + +static devclass_t opal_i2c_devclass; + +static driver_t opal_i2c_driver = { + "i2c", + opal_i2c_methods, + sizeof(struct opal_i2c_softc), +}; + +static int +opal_i2c_probe(device_t dev) +{ + + if (!(ofw_bus_is_compatible(dev, "ibm,opal-i2c"))) + return (ENXIO); + + device_set_desc(dev, "opal-i2c"); + + return (0); +} + +static int +opal_i2c_attach(device_t dev) +{ + struct opal_i2c_softc *sc; + int len; + + sc = device_get_softc(dev); + sc->dev = dev; + + len = OF_getproplen(ofw_bus_get_node(dev), "ibm,opal-id"); + if (len <= 0) + return (EINVAL); + OF_getencprop(ofw_bus_get_node(dev), "ibm,opal-id", &sc->opal_id, len); + + if ((sc->iicbus = device_add_child(dev, "iicbus", -1)) == NULL) { + device_printf(dev, "could not allocate iicbus instance\n"); + return (EINVAL); + } + + I2C_LOCK_INIT(sc); + + return (bus_generic_attach(dev)); +} + +static int +opal_get_async_rc(struct opal_msg msg) +{ + if (msg.msg_type != OPAL_MSG_ASYNC_COMP) + return OPAL_PARAMETER; + else + return htobe64(msg.params[1]); +} + +static int +i2c_opal_send_request(uint32_t bus_id, struct opal_i2c_request *req) +{ + struct opal_msg msg; + int token, rc; + + /* + * XXX: + * Async tokens should be managed globally. Since there is + * only one place now, use hardcoded value. + */ + token = 0x112233; + + memset(&msg, 0, sizeof(msg)); + + rc = opal_call(OPAL_I2C_REQUEST, token, bus_id, + pmap_kextract((uint64_t)req)); + if (rc != OPAL_ASYNC_COMPLETION) + return (rc); + + do { + rc = opal_call(OPAL_CHECK_ASYNC_COMPLETION, + pmap_kextract((uint64_t)&msg), sizeof(msg), token); + } while (rc == OPAL_BUSY); + + if (rc != OPAL_SUCCESS) + return (rc); + + rc = opal_get_async_rc(msg); + + return rc; +} + +static int +opal_i2c_transfer(device_t dev, struct iic_msg *msgs, uint32_t nmsgs) +{ + struct opal_i2c_softc *sc; + int i, err = 0; + struct opal_i2c_request req; + + sc = device_get_softc(dev); + + memset(&req, 0, sizeof(req)); + + /* XXX: Currently OPAL can parse only 1 message */ + if (nmsgs > 1) { + device_printf(dev, + "trying to parse %d messages, while only 1 is supported\n", nmsgs); + return (ENOMEM); + } + + I2C_LOCK(sc); + for (i = 0; i < nmsgs; i++) { + req.type = (msgs[i].flags & IIC_M_RD) ? + OPAL_I2C_RAW_READ : OPAL_I2C_RAW_WRITE; + req.addr = htobe16(msgs[0].slave); + req.size = htobe32(msgs[0].len); + req.buffer_pa = htobe64(pmap_kextract((uint64_t)msgs[0].buf)); + + err = i2c_opal_send_request(sc->opal_id, &req); + } + I2C_UNLOCK(sc); + + return (err); +} + +static int +opal_i2c_callback(device_t dev, int index, caddr_t data) +{ + int error = 0; + + switch (index) { + case IIC_REQUEST_BUS: + break; + + case IIC_RELEASE_BUS: + break; + + default: + error = EINVAL; + } + + return (error); +} + +DRIVER_MODULE(opal_i2c, opal_i2cm, opal_i2c_driver, opal_i2c_devclass, NULL, + NULL); +DRIVER_MODULE(iicbus, opal_i2c, iicbus_driver, iicbus_devclass, NULL, NULL); +MODULE_DEPEND(opal_i2c, iicbus, 1, 1, 1); Added: head/sys/powerpc/powernv/opal_i2cm.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/powerpc/powernv/opal_i2cm.c Thu Mar 1 14:11:07 2018 (r330240) @@ -0,0 +1,133 @@ +/*- + * Copyright (c) 2017-2018 QCM Technologies. + * Copyright (c) 2017-2018 Semihalf. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#include "opt_platform.h" + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/bus.h> +#include <sys/conf.h> +#include <sys/kernel.h> +#include <sys/lock.h> +#include <sys/mbuf.h> +#include <sys/malloc.h> +#include <sys/module.h> +#include <sys/mutex.h> +#include <sys/rman.h> +#include <machine/bus.h> + +#ifdef FDT +#include <dev/ofw/ofw_bus.h> +#include <dev/ofw/ofw_bus_subr.h> +#endif + +struct opal_i2cm_softc +{ + +}; + +static int opal_i2cm_attach(device_t); +static int opal_i2cm_probe(device_t); +static const struct ofw_bus_devinfo * + opal_i2cm_get_devinfo(device_t, device_t); + +static device_method_t opal_i2cm_methods[] = { + /* Device interface */ + DEVMETHOD(device_probe, opal_i2cm_probe), + DEVMETHOD(device_attach, opal_i2cm_attach), + + /* ofw_bus interface */ + DEVMETHOD(ofw_bus_get_devinfo, opal_i2cm_get_devinfo), + DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), + DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), + DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), + DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), + DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), + + DEVMETHOD_END +}; + +static devclass_t opal_i2cm_devclass; + +static int +opal_i2cm_probe(device_t dev) +{ + + if (!(ofw_bus_is_compatible(dev, "ibm,centaur-i2cm") || + ofw_bus_is_compatible(dev, "ibm,power8-i2cm"))) + return (ENXIO); + + device_set_desc(dev, "centaur-i2cm"); + return (0); +} + +static int +opal_i2cm_attach(device_t dev) +{ + phandle_t child; + device_t cdev; + struct ofw_bus_devinfo *dinfo; + + for (child = OF_child(ofw_bus_get_node(dev)); child != 0; + child = OF_peer(child)) { + dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_WAITOK | M_ZERO); + if (ofw_bus_gen_setup_devinfo(dinfo, child) != 0) { + free(dinfo, M_DEVBUF); + continue; + } + cdev = device_add_child(dev, NULL, -1); + if (cdev == NULL) { + device_printf(dev, "<%s>: device_add_child failed\n", + dinfo->obd_name); + ofw_bus_gen_destroy_devinfo(dinfo); + free(dinfo, M_DEVBUF); + continue; + } + device_set_ivars(cdev, dinfo); + } + + return (bus_generic_attach(dev)); +} + +static const struct ofw_bus_devinfo * +opal_i2cm_get_devinfo(device_t dev, device_t child) +{ + return (device_get_ivars(child)); +} + +DEFINE_CLASS_0(opal_i2cm, opal_i2cm_driver, opal_i2cm_methods, + sizeof(struct opal_i2cm_softc)); +DRIVER_MODULE(opal_i2cm, powernv_xscom, opal_i2cm_driver, opal_i2cm_devclass, NULL, + NULL); +DRIVER_MODULE(opal_i2cm, powernv_centaur, opal_i2cm_driver, opal_i2cm_devclass, NULL, + NULL); + Added: head/sys/powerpc/powernv/powernv_centaur.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/powerpc/powernv/powernv_centaur.c Thu Mar 1 14:11:07 2018 (r330240) @@ -0,0 +1,130 @@ +/*- + * Copyright (c) 2017-2018 QCM Technologies. + * Copyright (c) 2017-2018 Semihalf. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#include "opt_platform.h" + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/bus.h> +#include <sys/conf.h> +#include <sys/kernel.h> +#include <sys/lock.h> +#include <sys/mbuf.h> +#include <sys/malloc.h> +#include <sys/module.h> +#include <sys/mutex.h> +#include <sys/rman.h> +#include <machine/bus.h> + +#ifdef FDT +#include <dev/ofw/ofw_bus.h> +#include <dev/ofw/ofw_bus_subr.h> +#endif + +struct powernv_centaur_softc +{ + +}; + +static int powernv_centaur_attach(device_t); +static int powernv_centaur_probe(device_t); +static const struct ofw_bus_devinfo * + powernv_centaur_get_devinfo(device_t, device_t); + +static device_method_t powernv_centaur_methods[] = { + /* Device interface */ + DEVMETHOD(device_probe, powernv_centaur_probe), + DEVMETHOD(device_attach, powernv_centaur_attach), + + /* ofw_bus interface */ + DEVMETHOD(ofw_bus_get_devinfo, powernv_centaur_get_devinfo), + DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), + DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), + DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), + DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), + DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), + + DEVMETHOD_END +}; + +static devclass_t powernv_centaur_devclass; + +static int +powernv_centaur_probe(device_t dev) +{ + + if (!(ofw_bus_is_compatible(dev, "ibm,centaur"))) + return (ENXIO); + + device_set_desc(dev, "centaur"); + return (0); +} + +static int +powernv_centaur_attach(device_t dev) +{ + phandle_t child; + device_t cdev; + struct ofw_bus_devinfo *dinfo; + + for (child = OF_child(ofw_bus_get_node(dev)); child != 0; + child = OF_peer(child)) { + dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_WAITOK | M_ZERO); + if (ofw_bus_gen_setup_devinfo(dinfo, child) != 0) { + free(dinfo, M_DEVBUF); + continue; + } + cdev = device_add_child(dev, NULL, -1); + if (cdev == NULL) { + device_printf(dev, "<%s>: device_add_child failed\n", + dinfo->obd_name); + ofw_bus_gen_destroy_devinfo(dinfo); + free(dinfo, M_DEVBUF); + continue; + } + device_set_ivars(cdev, dinfo); + } + + return (bus_generic_attach(dev)); +} + +static const struct ofw_bus_devinfo * +powernv_centaur_get_devinfo(device_t dev, device_t child) +{ + return (device_get_ivars(child)); +} + +DEFINE_CLASS_0(powernv_centaur, powernv_centaur_driver, powernv_centaur_methods, + sizeof(struct powernv_centaur_softc)); +DRIVER_MODULE(powernv_centaur, ofwbus, powernv_centaur_driver, powernv_centaur_devclass, NULL, + NULL); + Added: head/sys/powerpc/powernv/powernv_xscom.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/powerpc/powernv/powernv_xscom.c Thu Mar 1 14:11:07 2018 (r330240) @@ -0,0 +1,130 @@ +/*- + * Copyright (c) 2017-2018 QCM Technologies. + * Copyright (c) 2017-2018 Semihalf. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#include "opt_platform.h" + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/bus.h> +#include <sys/conf.h> +#include <sys/kernel.h> +#include <sys/lock.h> +#include <sys/mbuf.h> +#include <sys/malloc.h> +#include <sys/module.h> +#include <sys/mutex.h> +#include <sys/rman.h> +#include <machine/bus.h> + +#ifdef FDT +#include <dev/ofw/ofw_bus.h> +#include <dev/ofw/ofw_bus_subr.h> +#endif + +struct powernv_xscom_softc +{ + +}; + +static int powernv_xscom_attach(device_t); +static int powernv_xscom_probe(device_t); +static const struct ofw_bus_devinfo * + powernv_xscom_get_devinfo(device_t, device_t); + +static device_method_t powernv_xscom_methods[] = { + /* Device interface */ + DEVMETHOD(device_probe, powernv_xscom_probe), + DEVMETHOD(device_attach, powernv_xscom_attach), + + /* ofw_bus interface */ + DEVMETHOD(ofw_bus_get_devinfo, powernv_xscom_get_devinfo), + DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), + DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), + DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), + DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), + DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), + + DEVMETHOD_END +}; + +static devclass_t powernv_xscom_devclass; + +static int +powernv_xscom_probe(device_t dev) +{ + + if (!(ofw_bus_is_compatible(dev, "ibm,xscom"))) + return (ENXIO); + + device_set_desc(dev, "xscom"); + return (0); +} + +static int +powernv_xscom_attach(device_t dev) +{ + phandle_t child; + device_t cdev; + struct ofw_bus_devinfo *dinfo; + + for (child = OF_child(ofw_bus_get_node(dev)); child != 0; + child = OF_peer(child)) { + dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_WAITOK | M_ZERO); + if (ofw_bus_gen_setup_devinfo(dinfo, child) != 0) { + free(dinfo, M_DEVBUF); + continue; + } + cdev = device_add_child(dev, NULL, -1); + if (cdev == NULL) { + device_printf(dev, "<%s>: device_add_child failed\n", + dinfo->obd_name); + ofw_bus_gen_destroy_devinfo(dinfo); + free(dinfo, M_DEVBUF); + continue; + } + device_set_ivars(cdev, dinfo); + } + + return (bus_generic_attach(dev)); +} + +static const struct ofw_bus_devinfo * +powernv_xscom_get_devinfo(device_t dev, device_t child) +{ + return (device_get_ivars(child)); +} + +DEFINE_CLASS_0(powernv_xscom, powernv_xscom_driver, powernv_xscom_methods, + sizeof(struct powernv_xscom_softc)); +DRIVER_MODULE(powernv_xscom, ofwbus, powernv_xscom_driver, powernv_xscom_devclass, NULL, + NULL); +
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