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Date:      Tue, 17 Sep 2002 02:31:57 -0700 (PDT)
From:      Don Lewis <dl-freebsd@catspoiler.org>
To:        brandt@fokus.gmd.de
Cc:        dl-freebsd@catspoiler.org, phk@critter.freebsd.dk, archie@dellroad.org, bde@zeta.org.au, joe@FreeBSD.org, obrien@FreeBSD.org, cvs-committers@FreeBSD.org, cvs-all@FreeBSD.org
Subject:   Re: cvs commit: src/sys/kern kern_timeout.c 
Message-ID:  <200209170932.g8H9Vvwr015410@gw.catspoiler.org>
In-Reply-To: <20020917111410.U812-100000@beagle.fokus.gmd.de>

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On 17 Sep, Harti Brandt wrote:
> On Tue, 17 Sep 2002, Don Lewis wrote:
> 
> DL>On 17 Sep, Harti Brandt wrote:

> DL>> (2) two macros MII_SET and MII_CLR are used to fiddle with the MDIO bits.
> DL>> This looks fine from an aesthetic standpoint of view, but adds some dozens
> DL>> of additional operations. I introduced a MII_SETCLR macro which can set
> DL>> and clear bits at the same time. This reduces the readreg time further to
> DL>> 250usecs.
> DL>
> DL>There is a problem here.  The 802.3 spec says that MDIO may not change
> DL>within 10ns of the rising edge of the clock.  Even if the card doesn't
> DL>require strict adherence to the 802.3 timing, I'd expect that changing
> DL>both at the same time would be hazardous.
> 
> In the place where the macro is used, it clears the clock bit and sets the
> data bit, so this is the falling edge of the clock, which should be ok.

Ok.  I had reversed the order of the arguments to the macro when I read
the patch the first time.


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