Date: Sun, 22 Jul 2007 17:37:49 GMT From: Oleksandr Tymoshenko <gonzo@FreeBSD.org> To: Perforce Change Reviews <perforce@FreeBSD.org> Subject: PERFORCE change 123914 for review Message-ID: <200707221737.l6MHbnjW013020@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=123914 Change 123914 by gonzo@gonzo_jeeves on 2007/07/22 17:37:30 o Update config/mips from vendor repo Affected files ... .. //depot/projects/mips2/src/contrib/gcc/config/mips/5400.md#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/5500.md#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/7000.md#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/9000.md#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/elf.h#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/elforion.h#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/freebsd.h#6 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/iris5.h#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/iris6.h#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/irix-crti.asm#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/irix-crtn.asm#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/linux.h#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/linux64.h#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/mips-modes.def#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/mips-protos.h#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/mips.c#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/mips.h#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/mips.md#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/mips16.S#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/netbsd.h#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/openbsd.h#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/r3900.h#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/rtems.h#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/sdb.h#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/sr71k.md#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/t-elf#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/t-iris#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/t-iris6#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/t-isa3264#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/t-linux64#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/t-mips#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/t-r3900#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/t-rtems#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/t-vr#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/vr.h#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/vxworks.h#2 edit .. //depot/projects/mips2/src/contrib/gcc/config/mips/windiss.h#2 edit Differences ... ==== //depot/projects/mips2/src/contrib/gcc/config/mips/5400.md#2 (text+ko) ==== @@ -26,20 +26,17 @@ (define_insn_reservation "ir_vr54_load" 2 (and (eq_attr "cpu" "r5400") - (and (eq_attr "type" "load") - (eq_attr "mode" "!SF,DF,FPSW"))) + (eq_attr "type" "load,fpload,fpidxload")) "vr54_mem") (define_insn_reservation "ir_vr54_store" 1 (and (eq_attr "cpu" "r5400") - (and (eq_attr "type" "store") - (eq_attr "mode" "!SF,DF,FPSW"))) + (eq_attr "type" "store")) "vr54_mem") (define_insn_reservation "ir_vr54_fstore" 1 (and (eq_attr "cpu" "r5400") - (and (eq_attr "type" "store") - (eq_attr "mode" "SF,DF"))) + (eq_attr "type" "fpstore,fpidxstore")) "vr54_mem") @@ -58,29 +55,29 @@ (define_insn_reservation "ir_vr54_hilo" 1 (and (eq_attr "cpu" "r5400") - (eq_attr "type" "hilo")) + (eq_attr "type" "mthilo,mfhilo")) "vr54_dp0|vr54_dp1") (define_insn_reservation "ir_vr54_arith" 1 (and (eq_attr "cpu" "r5400") - (eq_attr "type" "move,arith,darith,const,icmp,nop")) + (eq_attr "type" "arith,shift,slt,clz,const,nop,trap")) "vr54_dp0|vr54_dp1") (define_insn_reservation "ir_vr54_imul_si" 3 (and (eq_attr "cpu" "r5400") - (and (eq_attr "type" "imul") + (and (eq_attr "type" "imul,imul3") (eq_attr "mode" "SI"))) "vr54_dp0|vr54_dp1") (define_insn_reservation "ir_vr54_imul_di" 4 (and (eq_attr "cpu" "r5400") - (and (eq_attr "type" "imul") + (and (eq_attr "type" "imul,imul3") (eq_attr "mode" "DI"))) "vr54_dp0|vr54_dp1") (define_insn_reservation "ir_vr54_imadd_si" 3 (and (eq_attr "cpu" "r5400") - (eq_attr "type" "imul")) + (eq_attr "type" "imul,imul3")) "vr54_mac") (define_insn_reservation "ir_vr54_idiv_si" 42 @@ -126,19 +123,19 @@ (define_insn_reservation "ir_vr54_fdiv_sf" 42 (and (eq_attr "cpu" "r5400") - (and (eq_attr "type" "fdiv,fsqrt") + (and (eq_attr "type" "fdiv,frdiv,fsqrt") (eq_attr "mode" "SF"))) "vr54_dp0|vr54_dp1") (define_insn_reservation "ir_vr54_fdiv_df" 72 (and (eq_attr "cpu" "r5400") - (and (eq_attr "type" "fdiv,fsqrt") + (and (eq_attr "type" "fdiv,frdiv,fsqrt") (eq_attr "mode" "DF"))) "vr54_dp0|vr54_dp1") (define_insn_reservation "ir_vr54_fabs" 2 (and (eq_attr "cpu" "r5400") - (eq_attr "type" "fabs,fneg")) + (eq_attr "type" "fabs,fneg,fmove")) "vr54_dp0|vr54_dp1") (define_insn_reservation "ir_vr54_fcmp" 2 ==== //depot/projects/mips2/src/contrib/gcc/config/mips/5500.md#2 (text+ko) ==== @@ -28,12 +28,17 @@ (define_insn_reservation "ir_vr55_load" 3 (and (eq_attr "cpu" "r5500") - (eq_attr "type" "load")) + (eq_attr "type" "load,fpload,fpidxload")) "vr55_mem") -(define_insn_reservation "ir_vr55_store" 1 +(define_bypass 4 + "ir_vr55_load" + "ir_vr55_mthilo,ir_vr55_imul_si,ir_vr55_imul_di,ir_vr55_imadd, + ir_vr55_idiv_si,ir_vr55_idiv_di") + +(define_insn_reservation "ir_vr55_store" 0 (and (eq_attr "cpu" "r5500") - (eq_attr "type" "store")) + (eq_attr "type" "store,fpstore,fpidxstore")) "vr55_mem") ;; This reservation is for conditional move based on integer @@ -49,33 +54,66 @@ (eq_attr "type" "xfer")) "vr55_dp0|vr55_dp1") -(define_insn_reservation "ir_vr55_hilo" 2 +(define_insn_reservation "ir_vr55_arith" 1 (and (eq_attr "cpu" "r5500") - (eq_attr "type" "hilo")) + (eq_attr "type" "arith,shift,slt,clz,const,nop,trap")) "vr55_dp0|vr55_dp1") -(define_insn_reservation "ir_vr55_arith" 1 +(define_bypass 2 + "ir_vr55_arith" + "ir_vr55_mthilo,ir_vr55_imul_si,ir_vr55_imul_di,ir_vr55_imadd, + ir_vr55_idiv_si,ir_vr55_idiv_di") + +(define_insn_reservation "ir_vr55_mthilo" 1 + (and (eq_attr "cpu" "r5500") + (eq_attr "type" "mthilo")) + "vr55_mac") + +(define_insn_reservation "ir_vr55_mfhilo" 5 (and (eq_attr "cpu" "r5500") - (eq_attr "type" "move,arith,darith,const,icmp,nop")) - "vr55_dp0|vr55_dp1") + (eq_attr "type" "mfhilo")) + "vr55_mac") -(define_insn_reservation "ir_vr55_imul_si" 3 +;; The default latency is for the GPR result of a mul. Bypasses handle the +;; latency of {mul,mult}->{mfhi,mflo}. +(define_insn_reservation "ir_vr55_imul_si" 5 (and (eq_attr "cpu" "r5500") - (and (eq_attr "type" "imul") + (and (eq_attr "type" "imul,imul3") (eq_attr "mode" "SI"))) "vr55_mac") -(define_insn_reservation "ir_vr55_imul_di" 4 +;; The default latency is for pre-reload scheduling and handles the case +;; where a pseudo destination will be stored in a GPR (as it usually is). +;; The delay includes the latency of the dmult itself and the anticipated +;; mflo or mfhi. +;; +;; Once the mflo or mfhi has been created, bypasses handle the latency +;; between it and the dmult. +(define_insn_reservation "ir_vr55_imul_di" 9 (and (eq_attr "cpu" "r5500") - (and (eq_attr "type" "imul") + (and (eq_attr "type" "imul,imul3") (eq_attr "mode" "DI"))) - "vr55_mac") + "vr55_mac*4") -(define_insn_reservation "ir_vr55_imadd_si" 3 +;; The default latency is as for ir_vr55_imul_si. +(define_insn_reservation "ir_vr55_imadd" 5 (and (eq_attr "cpu" "r5500") - (eq_attr "type" "imul")) + (eq_attr "type" "imadd")) "vr55_mac") +(define_bypass 1 + "ir_vr55_imul_si,ir_vr55_imadd" + "ir_vr55_imadd" + "mips_linked_madd_p") + +(define_bypass 2 + "ir_vr55_imul_si,ir_vr55_imadd" + "ir_vr55_mfhilo") + +(define_bypass 4 + "ir_vr55_imul_di" + "ir_vr55_mfhilo") + ;; Divide algorithm is early out with best latency of 7 pcycles. ;; Use worst case for scheduling purposes. (define_insn_reservation "ir_vr55_idiv_si" 42 @@ -121,19 +159,19 @@ (define_insn_reservation "ir_vr55_fdiv_sf" 30 (and (eq_attr "cpu" "r5500") - (and (eq_attr "type" "fdiv,fsqrt") + (and (eq_attr "type" "fdiv,frdiv,fsqrt") (eq_attr "mode" "SF"))) "vr55_mac") (define_insn_reservation "ir_vr55_fdiv_df" 59 (and (eq_attr "cpu" "r5500") - (and (eq_attr "type" "fdiv,fsqrt") + (and (eq_attr "type" "fdiv,frdiv,fsqrt") (eq_attr "mode" "DF"))) "vr55_mac") (define_insn_reservation "ir_vr55_fabs" 2 (and (eq_attr "cpu" "r5500") - (eq_attr "type" "fabs,fneg")) + (eq_attr "type" "fabs,fneg,fmove")) "vr55_fp") (define_insn_reservation "ir_vr55_fcmp" 2 ==== //depot/projects/mips2/src/contrib/gcc/config/mips/7000.md#2 (text+ko) ==== @@ -1,5 +1,5 @@ ;; DFA-based pipeline description for the RM7000. -;; Copyright (C) 2003 Free Software Foundation, Inc. +;; Copyright (C) 2003, 2004, 2005 Free Software Foundation, Inc. ;; ;; This file is part of GCC. @@ -15,8 +15,8 @@ ;; You should have received a copy of the GNU General Public License ;; along with GCC; see the file COPYING. If not, write to the -;; Free Software Foundation, 59 Temple Place - Suite 330, Boston, -;; MA 02111-1307, USA. +;; Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston, +;; MA 02110-1301, USA. ;; ......................... ;; @@ -42,39 +42,39 @@ (define_cpu_unit "ixum_addsub_agen" "rm7000_other") ;; Integer execution unit (F-Pipe). -(define_cpu_unit "ixuf_addsub" "rm7000_other") -(define_cpu_unit "ixuf_branch" "rm7000_other") -(define_cpu_unit "ixuf_mpydiv" "rm7000_other") +(define_cpu_unit "ixuf_addsub" "rm7000_other") +(define_cpu_unit "ixuf_branch" "rm7000_other") +(define_cpu_unit "ixuf_mpydiv" "rm7000_other") (define_cpu_unit "ixuf_mpydiv_iter" "rm7000_idiv") ;; Floating-point unit (F-Pipe). -(define_cpu_unit "fxuf_add" "rm7000_other") -(define_cpu_unit "fxuf_mpy" "rm7000_other") +(define_cpu_unit "fxuf_add" "rm7000_other") +(define_cpu_unit "fxuf_mpy" "rm7000_other") (define_cpu_unit "fxuf_mpy_iter" "rm7000_fdiv") (define_cpu_unit "fxuf_divsqrt" "rm7000_other") (define_cpu_unit "fxuf_divsqrt_iter" "rm7000_fdiv") (exclusion_set "ixuf_addsub" "ixuf_branch,ixuf_mpydiv,fxuf_add,fxuf_mpy,fxuf_divsqrt") -(exclusion_set "ixuf_branch" "ixuf_mpydiv,fxuf_add,fxuf_mpy,fxuf_divsqrt") -(exclusion_set "ixuf_mpydiv" "fxuf_add,fxuf_mpy,fxuf_divsqrt") -(exclusion_set "fxuf_add" "fxuf_mpy,fxuf_divsqrt") -(exclusion_set "fxuf_mpy" "fxuf_divsqrt") +(exclusion_set "ixuf_branch" "ixuf_mpydiv,fxuf_add,fxuf_mpy,fxuf_divsqrt") +(exclusion_set "ixuf_mpydiv" "fxuf_add,fxuf_mpy,fxuf_divsqrt") +(exclusion_set "fxuf_add" "fxuf_mpy,fxuf_divsqrt") +(exclusion_set "fxuf_mpy" "fxuf_divsqrt") -;; After branch any insn can not be issued. +;; After branch any insn cannot be issued. (absence_set "rm7_iss0,rm7_iss1" "ixuf_branch") ;; ;; Define reservations for unit name mnemonics or combinations. ;; -(define_reservation "rm7_iss" "rm7_iss0|rm7_iss1") +(define_reservation "rm7_iss" "rm7_iss0|rm7_iss1") (define_reservation "rm7_single_dispatch" "rm7_iss0+rm7_iss1") (define_reservation "rm7_iaddsub" "rm7_iss+(ixum_addsub_agen|ixuf_addsub)") -(define_reservation "rm7_imem" "rm7_iss+ixum_addsub_agen") -(define_reservation "rm7_impydiv" "rm7_iss+ixuf_mpydiv") -(define_reservation "rm7_impydiv_iter" "ixuf_mpydiv_iter") -(define_reservation "rm7_branch" "rm7_iss+ixuf_branch") +(define_reservation "rm7_imem" "rm7_iss+ixum_addsub_agen") +(define_reservation "rm7_impydiv" "rm7_iss+ixuf_mpydiv") +(define_reservation "rm7_impydiv_iter" "ixuf_mpydiv_iter") +(define_reservation "rm7_branch" "rm7_iss+ixuf_branch") (define_reservation "rm7_fpadd" "rm7_iss+fxuf_add") (define_reservation "rm7_fpmpy" "rm7_iss+fxuf_mpy") @@ -87,125 +87,129 @@ ;; (define_insn_reservation "rm7_int_other" 1 - (and (eq_attr "cpu" "r7000") - (eq_attr "type" "arith,darith,const,move,condmove,icmp,nop")) - "rm7_iaddsub") + (and (eq_attr "cpu" "r7000") + (eq_attr "type" "arith,shift,slt,clz,const,condmove,nop,trap")) + "rm7_iaddsub") -(define_insn_reservation "rm7_ld" 2 (and (eq_attr "cpu" "r7000") - (eq_attr "type" "load")) - "rm7_imem") +(define_insn_reservation "rm7_ld" 2 + (and (eq_attr "cpu" "r7000") + (eq_attr "type" "load,fpload,fpidxload")) + "rm7_imem") -(define_insn_reservation "rm7_st" 1 (and (eq_attr "cpu" "r7000") - (eq_attr "type" "store")) - "rm7_imem") +(define_insn_reservation "rm7_st" 1 + (and (eq_attr "cpu" "r7000") + (eq_attr "type" "store,fpstore,fpidxstore")) + "rm7_imem") -(define_insn_reservation "rm7_idiv_si" 36 (and (eq_attr "cpu" "r7000") - (and (eq_attr "type" "idiv") - (eq_attr "mode" "SI"))) - "rm7_impydiv+(rm7_impydiv_iter*36)") +(define_insn_reservation "rm7_idiv_si" 36 + (and (eq_attr "cpu" "r7000") + (and (eq_attr "type" "idiv") + (eq_attr "mode" "SI"))) + "rm7_impydiv+(rm7_impydiv_iter*36)") -(define_insn_reservation "rm7_idiv_di" 68 (and (eq_attr "cpu" "r7000") - (and (eq_attr "type" "idiv") - (eq_attr "mode" "DI"))) - "rm7_impydiv+(rm7_impydiv_iter*68)") +(define_insn_reservation "rm7_idiv_di" 68 + (and (eq_attr "cpu" "r7000") + (and (eq_attr "type" "idiv") + (eq_attr "mode" "DI"))) + "rm7_impydiv+(rm7_impydiv_iter*68)") (define_insn_reservation "rm7_impy_si_mult" 5 - (and (eq_attr "cpu" "r7000") - (and (eq_attr "type" "imul,imadd") - (and (eq_attr "mode" "SI") - (match_operand 0 "hilo_operand" "")))) - "rm7_impydiv+(rm7_impydiv_iter*3)") + (and (eq_attr "cpu" "r7000") + (and (eq_attr "type" "imul,imadd") + (eq_attr "mode" "SI"))) + "rm7_impydiv+(rm7_impydiv_iter*3)") ;; There are an additional 2 stall cycles. (define_insn_reservation "rm7_impy_si_mul" 2 - (and (eq_attr "cpu" "r7000") - (and (eq_attr "type" "imul,imadd") - (and (eq_attr "mode" "SI") - (not (match_operand 0 "hilo_operand" ""))))) - "rm7_impydiv") + (and (eq_attr "cpu" "r7000") + (and (eq_attr "type" "imul3") + (eq_attr "mode" "SI"))) + "rm7_impydiv") -(define_insn_reservation "rm7_impy_di" 9 (and (eq_attr "cpu" "r7000") - (and (eq_attr "type" "imul") - (eq_attr "mode" "DI"))) - "rm7_impydiv+(rm7_impydiv_iter*8)") +(define_insn_reservation "rm7_impy_di" 9 + (and (eq_attr "cpu" "r7000") + (and (eq_attr "type" "imul,imul3") + (eq_attr "mode" "DI"))) + "rm7_impydiv+(rm7_impydiv_iter*8)") ;; Move to/from HI/LO. (define_insn_reservation "rm7_mthilo" 3 - (and (eq_attr "cpu" "r7000") - (and (eq_attr "type" "hilo") - (match_operand 0 "hilo_operand" ""))) - "rm7_impydiv") + (and (eq_attr "cpu" "r7000") + (eq_attr "type" "mthilo")) + "rm7_impydiv") (define_insn_reservation "rm7_mfhilo" 1 - (and (eq_attr "cpu" "r7000") - (and (eq_attr "type" "hilo") - (not (match_operand 0 "hilo_operand" "")))) - "rm7_impydiv") + (and (eq_attr "cpu" "r7000") + (eq_attr "type" "mfhilo")) + "rm7_impydiv") ;; Move to/from fp coprocessor. -(define_insn_reservation "rm7_ixfer" 2 (and (eq_attr "cpu" "r7000") - (eq_attr "type" "xfer")) - "rm7_iaddsub") +(define_insn_reservation "rm7_ixfer" 2 + (and (eq_attr "cpu" "r7000") + (eq_attr "type" "xfer")) + "rm7_iaddsub") -(define_insn_reservation "rm7_ibr" 3 (and (eq_attr "cpu" "r7000") - (eq_attr "type" "branch,jump,call")) - "rm7_branch") +(define_insn_reservation "rm7_ibr" 3 + (and (eq_attr "cpu" "r7000") + (eq_attr "type" "branch,jump,call")) + "rm7_branch") ;; ;; Describe instruction reservations for the floating-point operations. ;; (define_insn_reservation "rm7_fp_quick" 4 - (and (eq_attr "cpu" "r7000") - (eq_attr "type" "fneg,fcmp,fabs")) - "rm7_fpadd") + (and (eq_attr "cpu" "r7000") + (eq_attr "type" "fneg,fcmp,fabs,fmove")) + "rm7_fpadd") (define_insn_reservation "rm7_fp_other" 4 - (and (eq_attr "cpu" "r7000") - (eq_attr "type" "fadd")) - "rm7_fpadd") + (and (eq_attr "cpu" "r7000") + (eq_attr "type" "fadd")) + "rm7_fpadd") (define_insn_reservation "rm7_fp_cvt" 4 - (and (eq_attr "cpu" "r7000") - (eq_attr "type" "fcvt")) - "rm7_fpadd") + (and (eq_attr "cpu" "r7000") + (eq_attr "type" "fcvt")) + "rm7_fpadd") (define_insn_reservation "rm7_fp_divsqrt_df" 36 - (and (eq_attr "cpu" "r7000") - (and (eq_attr "type" "fdiv,fsqrt") - (eq_attr "mode" "DF"))) - "rm7_fpdivsqr+(rm7_fpdivsqr_iter*36)") + (and (eq_attr "cpu" "r7000") + (and (eq_attr "type" "fdiv,frdiv,fsqrt") + (eq_attr "mode" "DF"))) + "rm7_fpdivsqr+(rm7_fpdivsqr_iter*36)") (define_insn_reservation "rm7_fp_divsqrt_sf" 21 - (and (eq_attr "cpu" "r7000") - (and (eq_attr "type" "fdiv,fsqrt") - (eq_attr "mode" "SF"))) - "rm7_fpdivsqr+(rm7_fpdivsqr_iter*21)") + (and (eq_attr "cpu" "r7000") + (and (eq_attr "type" "fdiv,frdiv,fsqrt") + (eq_attr "mode" "SF"))) + "rm7_fpdivsqr+(rm7_fpdivsqr_iter*21)") (define_insn_reservation "rm7_fp_rsqrt_df" 68 - (and (eq_attr "cpu" "r7000") - (and (eq_attr "type" "frsqrt") - (eq_attr "mode" "DF"))) - "rm7_fpdivsqr+(rm7_fpdivsqr_iter*68)") + (and (eq_attr "cpu" "r7000") + (and (eq_attr "type" "frsqrt") + (eq_attr "mode" "DF"))) + "rm7_fpdivsqr+(rm7_fpdivsqr_iter*68)") (define_insn_reservation "rm7_fp_rsqrt_sf" 38 - (and (eq_attr "cpu" "r7000") - (and (eq_attr "type" "frsqrt") - (eq_attr "mode" "SF"))) - "rm7_fpdivsqr+(rm7_fpdivsqr_iter*38)") + (and (eq_attr "cpu" "r7000") + (and (eq_attr "type" "frsqrt") + (eq_attr "mode" "SF"))) + "rm7_fpdivsqr+(rm7_fpdivsqr_iter*38)") (define_insn_reservation "rm7_fp_mpy_sf" 4 - (and (eq_attr "cpu" "r7000") - (and (eq_attr "type" "fmul,fmadd") - (eq_attr "mode" "SF"))) - "rm7_fpmpy+rm7_fpmpy_iter") + (and (eq_attr "cpu" "r7000") + (and (eq_attr "type" "fmul,fmadd") + (eq_attr "mode" "SF"))) + "rm7_fpmpy+rm7_fpmpy_iter") (define_insn_reservation "rm7_fp_mpy_df" 5 - (and (eq_attr "cpu" "r7000") - (and (eq_attr "type" "fmul,fmadd") - (eq_attr "mode" "DF"))) - "rm7_fpmpy+(rm7_fpmpy_iter*2)") + (and (eq_attr "cpu" "r7000") + (and (eq_attr "type" "fmul,fmadd") + (eq_attr "mode" "DF"))) + "rm7_fpmpy+(rm7_fpmpy_iter*2)") ;; Force single-dispatch for unknown or multi. -(define_insn_reservation "rm7_unknown" 1 (and (eq_attr "cpu" "r7000") - (eq_attr "type" "unknown,multi")) - "rm7_single_dispatch") +(define_insn_reservation "rm7_unknown" 1 + (and (eq_attr "cpu" "r7000") + (eq_attr "type" "unknown,multi")) + "rm7_single_dispatch") ==== //depot/projects/mips2/src/contrib/gcc/config/mips/9000.md#2 (text+ko) ==== @@ -1,5 +1,5 @@ ;; DFA-based pipeline description for the RM9000. -;; Copyright (C) 2003 Free Software Foundation, Inc. +;; Copyright (C) 2003, 2004, 2005 Free Software Foundation, Inc. ;; ;; This file is part of GCC. @@ -15,8 +15,8 @@ ;; You should have received a copy of the GNU General Public License ;; along with GCC; see the file COPYING. If not, write to the -;; Free Software Foundation, 59 Temple Place - Suite 330, Boston, -;; MA 02111-1307, USA. +;; Free Software Foundation, 51 Franklin Street, Fifth Floor, Boston, +;; MA 02110-1301, USA. (define_automaton "rm9k_main, rm9k_imul, rm9k_fdiv") @@ -42,17 +42,17 @@ (define_insn_reservation "rm9k_load" 3 (and (eq_attr "cpu" "r9000") - (eq_attr "type" "load")) + (eq_attr "type" "load,fpload,fpidxload")) "rm9k_m") (define_insn_reservation "rm9k_store" 1 (and (eq_attr "cpu" "r9000") - (eq_attr "type" "store")) + (eq_attr "type" "store,fpstore,fpidxstore")) "rm9k_m") (define_insn_reservation "rm9k_int" 1 (and (eq_attr "cpu" "r9000") - (eq_attr "type" "move,arith,darith,const,icmp,nop")) + (eq_attr "type" "arith,shift,slt,clz,const,nop,trap")) "rm9k_any1 | rm9k_any2") (define_insn_reservation "rm9k_int_cmove" 2 @@ -64,13 +64,13 @@ ;; This applies to both 'mul' and 'mult'. (define_insn_reservation "rm9k_mulsi" 3 (and (eq_attr "cpu" "r9000") - (and (eq_attr "type" "imul,imadd") + (and (eq_attr "type" "imul,imul3,imadd") (eq_attr "mode" "!DI"))) "rm9k_f_int") (define_insn_reservation "rm9k_muldi" 7 (and (eq_attr "cpu" "r9000") - (and (eq_attr "type" "imul,imadd") + (and (eq_attr "type" "imul,imul3,imadd") (eq_attr "mode" "DI"))) "rm9k_f_int + rm9k_imul * 7") @@ -88,14 +88,12 @@ (define_insn_reservation "rm9k_mfhilo" 1 (and (eq_attr "cpu" "r9000") - (and (eq_attr "type" "hilo") - (not (match_operand 0 "hilo_operand" "")))) + (eq_attr "type" "mfhilo")) "rm9k_f_int") (define_insn_reservation "rm9k_mthilo" 5 (and (eq_attr "cpu" "r9000") - (and (eq_attr "type" "hilo") - (match_operand 0 "hilo_operand" ""))) + (eq_attr "type" "mthilo")) "rm9k_f_int") (define_insn_reservation "rm9k_xfer" 2 @@ -105,7 +103,7 @@ (define_insn_reservation "rm9k_fquick" 2 (and (eq_attr "cpu" "r9000") - (eq_attr "type" "fabs,fneg,fcmp")) + (eq_attr "type" "fabs,fneg,fcmp,fmove")) "rm9k_f_float") (define_insn_reservation "rm9k_fcmove" 2 @@ -133,13 +131,13 @@ (define_insn_reservation "rm9k_fdivs" 22 (and (eq_attr "cpu" "r9000") - (and (eq_attr "type" "fdiv,fsqrt,frsqrt") + (and (eq_attr "type" "fdiv,frdiv,fsqrt,frsqrt") (eq_attr "mode" "SF"))) "rm9k_f_float + rm9k_fdiv * 22") (define_insn_reservation "rm9k_fdivd" 37 (and (eq_attr "cpu" "r9000") - (and (eq_attr "type" "fdiv,fsqrt,frsqrt") + (and (eq_attr "type" "fdiv,frdiv,fsqrt,frsqrt") (eq_attr "mode" "DF"))) "rm9k_f_float + rm9k_fdiv * 37") ==== //depot/projects/mips2/src/contrib/gcc/config/mips/elf.h#2 (text+ko) ==== @@ -1,5 +1,4 @@ -/* Definitions of target machine for GNU compiler. MIPS R3000 version with - GOFAST floating point library. +/* Target macros for mips*-elf targets. Copyright (C) 1994, 1997, 1999, 2000, 2002, 2003, 2004 Free Software Foundation, Inc. @@ -17,55 +16,22 @@ You should have received a copy of the GNU General Public License along with GCC; see the file COPYING. If not, write to -the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ +the Free Software Foundation, 51 Franklin Street, Fifth Floor, +Boston, MA 02110-1301, USA. */ -/* Biggest alignment supported by the object file format of this - machine. Use this macro to limit the alignment which can be - specified using the `__attribute__ ((aligned (N)))' construct. If - not defined, the default value is `BIGGEST_ALIGNMENT'. */ - -#undef MAX_OFILE_ALIGNMENT -#define MAX_OFILE_ALIGNMENT (32768*8) - -/* Switch into a generic section. */ -#undef TARGET_ASM_NAMED_SECTION -#define TARGET_ASM_NAMED_SECTION default_elf_asm_named_section - -/* The following macro defines the format used to output the second - operand of the .type assembler directive. Different svr4 assemblers - expect various different forms for this operand. The one given here - is just a default. You may need to override it in your machine- - specific tm.h file (depending upon the particulars of your assembler). */ - -#define TYPE_OPERAND_FMT "@%s" - -/* Define the strings used for the special svr4 .type and .size directives. - These strings generally do not vary from one system running svr4 to - another, but if a given system (e.g. m88k running svr) needs to use - different pseudo-op names for these, they may be overridden in the - file which includes this one. */ - -#undef TYPE_ASM_OP -#undef SIZE_ASM_OP -#define TYPE_ASM_OP "\t.type\t" -#define SIZE_ASM_OP "\t.size\t" - -/* If defined, a C expression whose value is a string containing the - assembler operation to identify the following data as - uninitialized global data. If not defined, and neither - `ASM_OUTPUT_BSS' nor `ASM_OUTPUT_ALIGNED_BSS' are defined, - uninitialized global data will be output in the data section if - `-fno-common' is passed, otherwise `ASM_OUTPUT_COMMON' will be - used. */ - -#ifndef BSS_SECTION_ASM_OP -#define BSS_SECTION_ASM_OP "\t.section\t.bss" -#endif - -#ifndef ASM_OUTPUT_ALIGNED_BSS -#define ASM_OUTPUT_ALIGNED_BSS mips_output_aligned_bss -#endif +/* MIPS assemblers don't have the usual .set foo,bar construct; + .set is used for assembler options instead. */ +#undef SET_ASM_OP +#define ASM_OUTPUT_DEF(FILE, LABEL1, LABEL2) \ + do \ + { \ + fputc ('\t', FILE); \ + assemble_name (FILE, LABEL1); \ + fputs (" = ", FILE); \ + assemble_name (FILE, LABEL2); \ + fputc ('\n', FILE); \ + } \ + while (0) #undef ASM_DECLARE_OBJECT_NAME #define ASM_DECLARE_OBJECT_NAME mips_declare_object_name @@ -73,52 +39,7 @@ #undef ASM_FINISH_DECLARE_OBJECT #define ASM_FINISH_DECLARE_OBJECT mips_finish_declare_object -#define ASM_OUTPUT_DEF(FILE,LABEL1,LABEL2) \ - do { fputc ( '\t', FILE); \ - assemble_name (FILE, LABEL1); \ - fputs ( " = ", FILE); \ - assemble_name (FILE, LABEL2); \ - fputc ( '\n', FILE); \ - } while (0) - -/* Note about .weak vs. .weakext - The mips native assemblers support .weakext, but not .weak. - mips-elf gas supports .weak, but not .weakext. - mips-elf gas has been changed to support both .weak and .weakext, - but until that support is generally available, the 'if' below - should serve. */ - -#undef ASM_WEAKEN_LABEL -#define ASM_WEAKEN_LABEL(FILE,NAME) ASM_OUTPUT_WEAK_ALIAS(FILE,NAME,0) -#define ASM_OUTPUT_WEAK_ALIAS(FILE,NAME,VALUE) \ - do { \ - if (TARGET_GAS) \ - fputs ("\t.weak\t", FILE); \ - else \ - fputs ("\t.weakext\t", FILE); \ - assemble_name (FILE, NAME); \ - if (VALUE) \ - { \ - fputc (' ', FILE); \ - assemble_name (FILE, VALUE); \ - } \ - fputc ('\n', FILE); \ - } while (0) - -#define MAKE_DECL_ONE_ONLY(DECL) (DECL_WEAK (DECL) = 1) - -/* On elf, we *do* have support for the .init and .fini sections, and we - can put stuff in there to be executed before and after `main'. We let - crtstuff.c and other files know this by defining the following symbols. - The definitions say how to change sections to the .init and .fini - sections. This is the same for all known elf assemblers. */ - -#undef INIT_SECTION_ASM_OP -#define INIT_SECTION_ASM_OP "\t.section\t.init" -#undef FINI_SECTION_ASM_OP -#define FINI_SECTION_ASM_OP "\t.section\t.fini" - -/* Don't set the target flags, this is done by the linker script */ +/* Leave the linker script to choose the appropriate libraries. */ #undef LIB_SPEC #define LIB_SPEC "" @@ -128,5 +49,6 @@ #undef ENDFILE_SPEC #define ENDFILE_SPEC "crtend%O%s crtn%O%s" -/* We support #pragma. */ -#define HANDLE_SYSV_PRAGMA 1 +#define NO_IMPLICIT_EXTERN_C 1 + +#define HANDLE_PRAGMA_PACK_PUSH_POP 1 ==== //depot/projects/mips2/src/contrib/gcc/config/mips/elforion.h#2 (text+ko) ==== @@ -16,7 +16,7 @@ You should have received a copy of the GNU General Public License along with GCC; see the file COPYING. If not, write to -the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ +the Free Software Foundation, 51 Franklin Street, Fifth Floor, +Boston, MA 02110-1301, USA. */ #define MIPS_CPU_STRING_DEFAULT "orion" ==== //depot/projects/mips2/src/contrib/gcc/config/mips/freebsd.h#6 (text+ko) ==== ==== //depot/projects/mips2/src/contrib/gcc/config/mips/iris5.h#2 (text+ko) ==== @@ -16,289 +16,30 @@ You should have received a copy of the GNU General Public License along with GCC; see the file COPYING. If not, write to -the Free Software Foundation, 59 Temple Place - Suite 330, -Boston, MA 02111-1307, USA. */ +the Free Software Foundation, 51 Franklin Street, Fifth Floor, +Boston, MA 02110-1301, USA. */ -/* We are compiling for IRIX now. */ -#undef TARGET_IRIX -#define TARGET_IRIX 1 +#ifdef IRIX_USING_GNU_LD +#define IRIX_SUBTARGET_LINK_SPEC "-melf32bsmip" +#else +#define IRIX_SUBTARGET_LINK_SPEC "-_SYSTYPE_SVR4" +#endif -/* Allow some special handling for IRIX 5. */ -#undef TARGET_IRIX5 -#define TARGET_IRIX5 1 - -#define ABICALLS_ASM_OP "\t.option pic2" - -/* Dummy definition which allows EXTRA_SECTION_FUNCTIONS to be the same - for IRIX 5 and 6. */ -#define BSS_SECTION_ASM_OP "\t.data" - -/* ??? This is correct, but not very useful, because there is no file that - uses this macro. */ -/* ??? The best way to handle global constructors under ELF is to use .init - and .fini sections. Unfortunately, there is apparently no way to get - the IRIX 5.x (x <= 2) assembler to create these sections. So we instead - use collect. The linker can create these sections via -init and -fini - options, but using this would require modifying how crtstuff works, and - I will leave that for another time (or someone else). */ -#define OBJECT_FORMAT_ELF -#define HAS_INIT_SECTION -#define LD_INIT_SWITCH "-init" -#define LD_FINI_SWITCH "-fini" - -/* The linker needs a space after "-o". */ -#define SWITCHES_NEED_SPACES "o" - -/* Specify wchar_t types. */ -#undef WCHAR_TYPE -#undef WCHAR_TYPE_SIZE -#undef MAX_WCHAR_TYPE_SIZE - -#define WCHAR_TYPE "int" -#define WCHAR_TYPE_SIZE INT_TYPE_SIZE -#define MAX_WCHAR_TYPE_SIZE 64 - -/* Plain char is unsigned in the SGI compiler. */ -#undef DEFAULT_SIGNED_CHAR -#define DEFAULT_SIGNED_CHAR 0 - -#define WORD_SWITCH_TAKES_ARG(STR) \ - (DEFAULT_WORD_SWITCH_TAKES_ARG (STR) \ - || !strcmp (STR, "rpath")) - -/* We must pass -D_LONGLONG always, even when -ansi is used, because IRIX 5 - system header files require it. This is OK, because gcc never warns - when long long is used in system header files. Alternatively, we can - add support for the SGI builtin type __long_long. */ - -#define TARGET_OS_CPP_BUILTINS() \ - do { \ - builtin_define_std ("host_mips"); \ - builtin_define_std ("sgi"); \ - builtin_define_std ("unix"); \ - builtin_define_std ("SYSTYPE_SVR4"); \ - builtin_define ("_LONGLONG"); \ - builtin_define ("_MODERN_C"); \ - builtin_define ("_SVR4_SOURCE"); \ - builtin_define ("__DSO__"); \ - builtin_define ("_ABIO32=1"); \ - builtin_define ("_MIPS_SIM=_ABIO32"); \ - builtin_define ("_MIPS_SZPTR=32"); \ - builtin_assert ("system=unix"); \ - builtin_assert ("system=svr4"); \ - builtin_assert ("machine=sgi"); \ - \ - if (!TARGET_FLOAT64) \ - builtin_define ("_MIPS_FPSET=16"); \ - else \ - builtin_define ("_MIPS_FPSET=32"); \ - \ - if (!TARGET_INT64) \ - builtin_define ("_MIPS_SZINT=32"); \ - else \ - builtin_define ("_MIPS_SZINT=64"); \ - \ - if (!TARGET_LONG64) \ - builtin_define ("_MIPS_SZLONG=32"); \ - else \ - builtin_define ("_MIPS_SZLONG=64"); \ - \ - if (!flag_iso) \ - { \ - builtin_define ("__EXTENSIONS__"); \ - builtin_define ("_SGI_SOURCE"); \ - } \ -} while (0); - -#undef SUBTARGET_CC1_SPEC -#define SUBTARGET_CC1_SPEC "%{static: -mno-abicalls}" - -/* Override mips.h default: the IRIX 5 assembler warns about -O3: - - as1: Warning: <file>.s, line 1: Binasm file dictates -pic: 2 - uld: - No ucode object file linked -- please use -O2 or lower. - - So avoid passing it in the first place. */ -#undef SUBTARGET_ASM_OPTIMIZING_SPEC -#define SUBTARGET_ASM_OPTIMIZING_SPEC "\ -%{noasmopt:-O0} \ -%{!noasmopt:%{O|O1|O2|O3:-O2}}" - -#undef LINK_SPEC -#define LINK_SPEC "\ -%{G*} %{EB} %{EL} %{mips1} %{mips2} %{mips3} \ -%{bestGnum} %{shared} %{non_shared} \ -%{call_shared} %{no_archive} %{exact_version} \ -%{static: -non_shared} \ +#undef STARTFILE_SPEC +#define STARTFILE_SPEC "\ %{!static: \ - %{!shared:%{!non_shared:%{!call_shared: -call_shared -no_unresolved}}}} \ -%{rpath} \ --_SYSTYPE_SVR4" - -/* We now support shared libraries. */ -#define IRIX_STARTFILE_SPEC "\ -%{!static: \ %{!shared:%{pg:gcrt1.o%s}%{!pg:%{p:mcrt1.o%s libprof1.a%s}%{!p:crt1.o%s}}}} \ %{static: \ %{pg:gcrt1.o%s} \ %{!pg:%{p:/usr/lib/nonshared/mcrt1.o%s libprof1.a%s} \ - %{!p:/usr/lib/nonshared/crt1.o%s}}}" + %{!p:/usr/lib/nonshared/crt1.o%s}}} \ +irix-crti.o%s crtbegin.o%s" -#undef STARTFILE_SPEC -#define STARTFILE_SPEC "%(irix_startfile_spec)" - #undef LIB_SPEC #define LIB_SPEC "%{!shared:%{p:-lprof1} %{pg:-lprof1} -lc}" -#define IRIX_ENDFILE_SPEC "%{!shared:crtn.o%s}" - #undef ENDFILE_SPEC -#define ENDFILE_SPEC "%(irix_endfile_spec)" - -/* We do not want to run mips-tfile! */ -#undef ASM_FINAL_SPEC +#define ENDFILE_SPEC "crtend.o%s irix-crtn.o%s %{!shared:crtn.o%s}" -/* The system header files are C++ aware. */ -/* ??? Unfortunately, most but not all of the headers are C++ aware. - Specifically, curses.h is not, and as a consequence, defining this - used to prevent libg++ building. This is no longer the case so - define it again to prevent other problems, e.g. with getopt in - unistd.h. We still need some way to fix just those files that need - fixing. */ -#define NO_IMPLICIT_EXTERN_C 1 - -/* We don't support debugging info for now. */ -#undef DBX_DEBUGGING_INFO -#undef MIPS_DEBUGGING_INFO -#undef PREFERRED_DEBUGGING_TYPE - -/* Likewise, the assembler doesn't handle DWARF2 directives. */ -#define DWARF2_UNWIND_INFO 0 - #undef MACHINE_TYPE #define MACHINE_TYPE "SGI running IRIX 5.x" - -/* Always use 1 for .file number. I [meissner@osf.org] wonder why - IRIX needs this. */ - -#undef SET_FILE_NUMBER -#define SET_FILE_NUMBER() num_source_filenames = 1 - -/* Put out a label after a .loc. I [meissner@osf.org] wonder why - IRIX needs this. */ - -#undef LABEL_AFTER_LOC -#define LABEL_AFTER_LOC(STREAM) fprintf (STREAM, "LM%d:\n", ++sym_lineno) - - /* Dollar signs are OK in IRIX 5 but not in IRIX 3. */ -#undef DOLLARS_IN_IDENTIFIERS -#undef NO_DOLLAR_IN_LABEL >>> TRUNCATED FOR MAIL (1000 lines) <<<
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