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Date:      Mon, 19 Nov 2018 23:56:33 +0000 (UTC)
From:      Marius Strobl <marius@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r340654 - head/sys/dev/sdhci
Message-ID:  <201811192356.wAJNuXPn065478@repo.freebsd.org>
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Author: marius
Date: Mon Nov 19 23:56:33 2018
New Revision: 340654
URL: https://svnweb.freebsd.org/changeset/base/340654

Log:
  For consistency within the front-end, prefer SDHCI_{READ,WRITE}_{2,4}()
  to sdhci_acpi_{read,write}_{2,4}() in the sdhci_acpi_set_uhs_timing()
  added in r340543.

Modified:
  head/sys/dev/sdhci/sdhci_acpi.c

Modified: head/sys/dev/sdhci/sdhci_acpi.c
==============================================================================
--- head/sys/dev/sdhci/sdhci_acpi.c	Mon Nov 19 23:54:49 2018	(r340653)
+++ head/sys/dev/sdhci/sdhci_acpi.c	Mon Nov 19 23:56:33 2018	(r340654)
@@ -203,7 +203,7 @@ sdhci_acpi_set_uhs_timing(device_t dev, struct sdhci_s
 	enum mmc_bus_timing timing;
 
 	bus = slot->bus;
-	old_timing = sdhci_acpi_read_2(bus, slot, SDHCI_HOST_CONTROL2);
+	old_timing = SDHCI_READ_2(bus, slot, SDHCI_HOST_CONTROL2);
 	old_timing &= SDHCI_CTRL2_UHS_MASK;
 	sdhci_generic_set_uhs_timing(dev, slot);
 
@@ -220,19 +220,19 @@ sdhci_acpi_set_uhs_timing(device_t dev, struct sdhci_s
 		timing = ios->timing;
 		if (old_timing == SDHCI_CTRL2_UHS_SDR104 &&
 		    timing == bus_timing_hs)
-			sdhci_acpi_write_2(bus, slot, SDHCI_HOST_CONTROL2,
-			    sdhci_acpi_read_2(bus, slot, SDHCI_HOST_CONTROL2) &
+			SDHCI_WRITE_2(bus, slot, SDHCI_HOST_CONTROL2,
+			    SDHCI_READ_2(bus, slot, SDHCI_HOST_CONTROL2) &
 			    ~SDHCI_CTRL2_SAMPLING_CLOCK);
 		if (ios->clock > SD_SDR50_MAX &&
 		    old_timing != SDHCI_CTRL2_MMC_HS400 &&
 		    timing == bus_timing_mmc_hs400) {
-			sdhci_acpi_write_2(bus, slot, SDHCI_HOST_CONTROL2,
-			    sdhci_acpi_read_2(bus, slot, SDHCI_HOST_CONTROL2) |
+			SDHCI_WRITE_2(bus, slot, SDHCI_HOST_CONTROL2,
+			    SDHCI_READ_2(bus, slot, SDHCI_HOST_CONTROL2) |
 			    SDHCI_CTRL2_SAMPLING_CLOCK);
-			sdhci_acpi_write_4(bus, slot, SDHCI_AMD_RESET_DLL_REG,
+			SDHCI_WRITE_4(bus, slot, SDHCI_AMD_RESET_DLL_REG,
 			    0x40003210);
 			DELAY(20);
-			sdhci_acpi_write_4(bus, slot, SDHCI_AMD_RESET_DLL_REG,
+			SDHCI_WRITE_4(bus, slot, SDHCI_AMD_RESET_DLL_REG,
 			    0x40033210);
 		}
 	}

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