Date: Tue, 26 Feb 2008 14:18:05 GMT From: "Randall R. Stewart" <rrs@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 136244 for review Message-ID: <200802261418.m1QEI5Vb046357@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=136244 Change 136244 by rrs@rrs-mips2-jnpr on 2008/02/26 14:17:20 Rework the exception code to store all registers and for user interrupts where we save all reg, do the ast. Affected files ... .. //depot/projects/mips2-jnpr/src/sys/mips/mips/exception.S#16 edit Differences ... ==== //depot/projects/mips2-jnpr/src/sys/mips/mips/exception.S#16 (text+ko) ==== @@ -291,6 +291,15 @@ SAVE_REG(t8, T8, sp) ;\ SAVE_REG(t9, T9, sp) ;\ SAVE_REG(gp, GP, sp) ;\ + SAVE_REG(s0, S0, sp) ;\ + SAVE_REG(s1, S1, sp) ;\ + SAVE_REG(s2, S2, sp) ;\ + SAVE_REG(s3, S3, sp) ;\ + SAVE_REG(s4, S4, sp) ;\ + SAVE_REG(s5, S5, sp) ;\ + SAVE_REG(s6, S6, sp) ;\ + SAVE_REG(s7, S7, sp) ;\ + SAVE_REG(s8, S8, sp) ;\ mflo v0 ;\ mfhi v1 ;\ mfc0 a0, COP_0_STATUS_REG ;\ @@ -310,21 +319,6 @@ addu a0, sp, STAND_ARG_SIZE ;\ ITLBNOPFIX -#ifdef DDB -#define SAVE_CPU_DDB \ - SAVE_REG(s0, S0, sp) ;\ - SAVE_REG(s1, S1, sp) ;\ - SAVE_REG(s2, S2, sp) ;\ - SAVE_REG(s3, S3, sp) ;\ - SAVE_REG(s4, S4, sp) ;\ - SAVE_REG(s5, S5, sp) ;\ - SAVE_REG(s6, S6, sp) ;\ - SAVE_REG(s7, S7, sp) ;\ - SAVE_REG(s8, S8, sp) -#else -#define SAVE_CPU_DDB -#endif - #define RESTORE_REG(reg, offs, base) \ LOAD reg, STAND_ARG_SIZE + (RSIZE * offs) (base) @@ -354,6 +348,15 @@ RESTORE_REG(t7, T7, sp) ;\ RESTORE_REG(t8, T8, sp) ;\ RESTORE_REG(t9, T9, sp) ;\ + RESTORE_REG(s0, S0, sp) ;\ + RESTORE_REG(s1, S1, sp) ;\ + RESTORE_REG(s2, S2, sp) ;\ + RESTORE_REG(s3, S3, sp) ;\ + RESTORE_REG(s4, S4, sp) ;\ + RESTORE_REG(s5, S5, sp) ;\ + RESTORE_REG(s6, S6, sp) ;\ + RESTORE_REG(s7, S7, sp) ;\ + RESTORE_REG(s8, S8, sp) ;\ RESTORE_REG(gp, GP, sp) ;\ RESTORE_REG(ra, RA, sp) ;\ addu sp, sp, KERN_EXC_FRAME_SIZE @@ -374,9 +377,7 @@ /* * Save CPU state, building 'frame'. */ - SAVE_CPU - SAVE_CPU_DDB /* * Call the exception handler. a0 points at the saved frame. */ @@ -385,11 +386,11 @@ jalr k0 sw a3, STAND_RA_OFFSET + KERN_REG_SIZE(sp) # for debugging - .set at - move s0, v0 - DO_AST - move v0, s0 - .set noat +/* .set at*/ + +/* Should I DO the AST stuff here? */ + +/* .set noat*/ RESTORE_CPU # v0 contains the return address. sync @@ -496,26 +497,25 @@ mtc0 v0, COP_0_STATUS_REG # set exeption level ITLBNOPFIX - GET_CPU_PCPU(a1) - lw a1, PC_CURPCB(a1) - - - RESTORE_U_PCB_REG(t0, MULLO, a1) - RESTORE_U_PCB_REG(t1, MULHI, a1) - mtlo t0 - mthi t1 - RESTORE_U_PCB_REG(a0, PC, a1) - .set noat - RESTORE_U_PCB_REG(AT, AST, a1) - RESTORE_U_PCB_REG(v0, V0, a1) - _MTC0 a0, COP_0_EXC_PC # set return address - + DO_AST + /* * The use of k1 for storing the PCB pointer must be done only * after interrupts are disabled. Otherwise it will get overwritten * by the interrupt code. */ - move k1, a1 + GET_CPU_PCPU(k1) + lw k1, PC_CURPCB(k1) + + RESTORE_U_PCB_REG(t0, MULLO, k1) + RESTORE_U_PCB_REG(t1, MULHI, k1) + mtlo t0 + mthi t1 + RESTORE_U_PCB_REG(a0, PC, k1) + .set noat + RESTORE_U_PCB_REG(AT, AST, k1) + RESTORE_U_PCB_REG(v0, V0, k1) + _MTC0 a0, COP_0_EXC_PC # set return address RESTORE_U_PCB_REG(v1, V1, k1) RESTORE_U_PCB_REG(a0, A0, k1) RESTORE_U_PCB_REG(a1, A1, k1) @@ -544,7 +544,6 @@ RESTORE_U_PCB_REG(k0, SR, k1) RESTORE_U_PCB_REG(s8, S8, k1) RESTORE_U_PCB_REG(ra, RA, k1) - /* * The restoration of the user SR must be done only after * k1 is no longer needed. Otherwise, k1 will get clobbered after @@ -580,8 +579,6 @@ .mask 0x80000000, (STAND_RA_OFFSET - KERN_EXC_FRAME_SIZE) /* * Save the relevant kernel registers onto the stack. - * We don't need to save s0 - s8, sp and gp because - * the compiler does it for us. */ SAVE_CPU /* @@ -652,6 +649,19 @@ SAVE_U_PCB_REG(gp, GP, k1) SAVE_U_PCB_REG(sp, SP, k1) SAVE_U_PCB_REG(ra, RA, k1) +/* + * save remaining user state in u.u_pcb. + */ + SAVE_U_PCB_REG(s0, S0, k1) + SAVE_U_PCB_REG(s1, S1, k1) + SAVE_U_PCB_REG(s2, S2, k1) + SAVE_U_PCB_REG(s3, S3, k1) + SAVE_U_PCB_REG(s4, S4, k1) + SAVE_U_PCB_REG(s5, S5, k1) + SAVE_U_PCB_REG(s6, S6, k1) + SAVE_U_PCB_REG(s7, S7, k1) + SAVE_U_PCB_REG(s8, S8, k1) + mflo v0 # get lo/hi late to avoid stall mfhi v1 mfc0 a0, COP_0_STATUS_REG @@ -665,7 +675,7 @@ subu sp, k1, STAND_FRAME_SIZE # switch to kernel SP la gp, _C_LABEL(_gp) # switch to kernel GP -# Turn off fpu and enter kernel mode +# Turn off fpu, disable interrupts, set kernel mode kernel mode, clear exception level. .set at and t0, a0, ~(SR_COP_1_BIT | SR_EXL | SR_INT_ENAB | SR_KSU_MASK) mtc0 t0, COP_0_STATUS_REG @@ -677,47 +687,16 @@ la k0, _C_LABEL(cpu_intr) jalr k0 sw a3, STAND_RA_OFFSET(sp) # for debugging - - DO_AST /* * Since interrupts are enabled at this point, we use a1 instead of * k0 or k1 to store the PCB pointer. This is because k0 and k1 - * are not preserved across interrupts. + * are not preserved across interrupts. ** RRS - And how did the + * get enabled? cpu_intr clears the cause register but it does + * not touch the sr as far as I can see thus intr are still + * disabled. */ - GET_CPU_PCPU(a1) - lw a1, PC_CURPCB(a1) - -/* - * save remaining user state in u.u_pcb. - */ - SAVE_U_PCB_REG(s0, S0, a1) - SAVE_U_PCB_REG(s1, S1, a1) - SAVE_U_PCB_REG(s2, S2, a1) - SAVE_U_PCB_REG(s3, S3, a1) - SAVE_U_PCB_REG(s4, S4, a1) - SAVE_U_PCB_REG(s5, S5, a1) - SAVE_U_PCB_REG(s6, S6, a1) - SAVE_U_PCB_REG(s7, S7, a1) - SAVE_U_PCB_REG(s8, S8, a1) - - /* Handle pending asynchronous softwre traps */ - la s0, _C_LABEL(disableintr) - jalr s0 - nop - GET_CPU_PCPU(s1) - lw s3, PC_CURPCB(s1) - lw s1, PC_CURTHREAD(s1) - lw s2, TD_FLAGS(s1) - li s0, TDF_ASTPENDING | TDF_NEEDRESCHED - and s2, s0 - la s0, _C_LABEL(enableintr) - jalr s0 - nop - beq s2, zero, 4f - nop - la s0, _C_LABEL(ast) - jalr s0 - addu a0, s3, U_PCB_REGS # only arg is frame + DO_AST + /* * Restore user registers and return. NOTE: interrupts are enabled. */ @@ -727,7 +706,6 @@ * k0 or k1 to store the PCB pointer. This is because k0 and k1 * are not preserved across interrupts. */ -4: GET_CPU_PCPU(a1) lw a1, PC_CURPCB(a1) RESTORE_U_PCB_REG(s0, S0, a1)
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