Date: Mon, 20 May 2013 23:18:46 GMT From: Philip Withnall <prw35@FreeBSD.org> To: Perforce Change Reviews <perforce@FreeBSD.org> Subject: PERFORCE change 228886 for review Message-ID: <201305202318.r4KNIkBe012482@skunkworks.freebsd.org>
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http://p4web.freebsd.org/@@228886?ac=10 Change 228886 by prw35@pwithnall_zenith on 2013/05/20 23:18:42 Add copyincap() and copyoutcap() system support functions These function like the copyin() and copyout() functions, except copy capabilities. Their implementation is simple at the moment, performing few security checks, and only copying a single capability (i.e. the length argument is ignored). Some supporting register/instruction macros have been added to asm.h. Affected files ... .. //depot/projects/ctsrd/cheribsd/src/sys/mips/include/asm.h#4 edit .. //depot/projects/ctsrd/cheribsd/src/sys/mips/mips/support.S#5 edit .. //depot/projects/ctsrd/cheribsd/src/sys/sys/systm.h#6 edit Differences ... ==== //depot/projects/ctsrd/cheribsd/src/sys/mips/include/asm.h#4 (text+ko) ==== @@ -370,37 +370,61 @@ */ #if _BYTE_ORDER == _LITTLE_ENDIAN # define LWHI lwr +# define CLWHI clwr # define LWLO lwl +# define CLWLO clwl # define SWHI swr +# define CSWHI cswr # define SWLO swl +# define CSWLO cswl # if SZREG == 4 # define REG_LHI lwr +# define REG_CLHI clwr # define REG_LLO lwl +# define REG_CLLO clwl # define REG_SHI swr +# define REG_CSHI cswr # define REG_SLO swl +# define REG_CSLO cswl # else # define REG_LHI ldr +# define REG_CLHI cldr # define REG_LLO ldl +# define REG_CLLO cldl # define REG_SHI sdr +# define REG_CSHI csdr # define REG_SLO sdl +# define REG_CSLO csdl # endif #endif #if _BYTE_ORDER == _BIG_ENDIAN # define LWHI lwl +# define CLWHI clwl # define LWLO lwr +# define CLWLO clwr # define SWHI swl +# define CSWHI cswl # define SWLO swr +# define CSWLO cswr # if SZREG == 4 # define REG_LHI lwl +# define REG_CLHI clwl # define REG_LLO lwr +# define REG_CLLO clwr # define REG_SHI swl +# define REG_CSHI cswl # define REG_SLO swr +# define REG_CSLO cswr # else # define REG_LHI ldl +# define REG_CLHI cldl # define REG_LLO ldr +# define REG_CLLO cldr # define REG_SHI sdl +# define REG_CSHI csdl # define REG_SLO sdr +# define REG_CSLO csdr # endif #endif ==== //depot/projects/ctsrd/cheribsd/src/sys/mips/mips/support.S#5 (text+ko) ==== @@ -93,9 +93,13 @@ #include <machine/regnum.h> #include <machine/cpuregs.h> #include <machine/pcb.h> +#include <machine/cherireg.h> #include "assym.s" +/* Build the kernel data capability (KDC) register identifier. */ +#define KDC $c30 + .set noreorder # Noreorder is default style! /* @@ -248,6 +252,35 @@ END(copyin) /* + * Copy specified amount of data from user space into the kernel, preserving + * capability tags + * copyincap(from, to, len) + * caddr_t *from; (user source address) + * caddr_t *to; (kernel destination address) + * unsigned len; + */ +NON_LEAF(copyincap, CALLFRAME_SIZ, ra) + PTR_SUBU sp, sp, CALLFRAME_SIZ + .mask 0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ) + PTR_LA v0, copyerr + blt a0, zero, _C_LABEL(copyerr) # make sure address is in user space + REG_S ra, CALLFRAME_RA(sp) + GET_CPU_PCPU(v1) + PTR_L v1, PC_CURPCB(v1) + # TODO: Implement a loop, perform more checking, etc. + clc $c1, a0, 0(KDC) # load the source + csc $c1, a1, 0(KDC) # store to the destination + PTR_S v0, U_PCB_ONFAULT(v1) + REG_L ra, CALLFRAME_RA(sp) + GET_CPU_PCPU(v1) + PTR_L v1, PC_CURPCB(v1) # bcopycap modified v1, so reload + PTR_S zero, U_PCB_ONFAULT(v1) + PTR_ADDU sp, sp, CALLFRAME_SIZ + j ra + move v0, zero +END(copyincap) + +/* * Copy specified amount of data from kernel to the user space * copyout(from, to, len) * caddr_t *from; (kernel source address) @@ -273,6 +306,35 @@ move v0, zero END(copyout) +/* + * Copy specified amount of data from kernel to the user space, preserving + * capability tags + * copyoutcap(from, to, len) + * caddr_t *from; (kernel source address) + * caddr_t *to; (user destination address) + * unsigned len; + */ +NON_LEAF(copyoutcap, CALLFRAME_SIZ, ra) + PTR_SUBU sp, sp, CALLFRAME_SIZ + .mask 0x80000000, (CALLFRAME_RA - CALLFRAME_SIZ) + PTR_LA v0, copyerr + blt a1, zero, _C_LABEL(copyerr) # make sure address is in user space + REG_S ra, CALLFRAME_RA(sp) + GET_CPU_PCPU(v1) + PTR_L v1, PC_CURPCB(v1) + # TODO: Implement a loop, perform more checking, etc. + clc $c1, a0, 0(KDC) # load the source + csc $c1, a1, 0(KDC) # store to the destination + PTR_S v0, U_PCB_ONFAULT(v1) + REG_L ra, CALLFRAME_RA(sp) + GET_CPU_PCPU(v1) + PTR_L v1, PC_CURPCB(v1) # bcopycap modified v1, so reload + PTR_S zero, U_PCB_ONFAULT(v1) + PTR_ADDU sp, sp, CALLFRAME_SIZ + j ra + move v0, zero +END(copyoutcap) + LEAF(copyerr) REG_L ra, CALLFRAME_RA(sp) PTR_ADDU sp, sp, CALLFRAME_SIZ ==== //depot/projects/ctsrd/cheribsd/src/sys/sys/systm.h#6 (text+ko) ==== @@ -234,10 +234,14 @@ __nonnull(1) __nonnull(2); int copyin(const void * __restrict udaddr, void * __restrict kaddr, size_t len) __nonnull(1) __nonnull(2); +int copyincap(const void * __restrict udaddr, void * __restrict kaddr, + size_t len) __nonnull(1) __nonnull(2); int copyin_nofault(const void * __restrict udaddr, void * __restrict kaddr, size_t len) __nonnull(1) __nonnull(2); int copyout(const void * __restrict kaddr, void * __restrict udaddr, size_t len) __nonnull(1) __nonnull(2); +int copyoutcap(const void * __restrict kaddr, void * __restrict udaddr, + size_t len) __nonnull(1) __nonnull(2); int copyout_nofault(const void * __restrict kaddr, void * __restrict udaddr, size_t len) __nonnull(1) __nonnull(2);help
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