Date: Sat, 23 Mar 2019 14:10:06 +0000 (UTC) From: Dimitry Andric <dim@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r345449 - head/contrib/llvm/lib/Target/ARM Message-ID: <201903231410.x2NEA6R3004586@repo.freebsd.org>
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Author: dim Date: Sat Mar 23 14:10:05 2019 New Revision: 345449 URL: https://svnweb.freebsd.org/changeset/base/345449 Log: Pull in r356809 from upstream llvm trunk (by Eli Friedman): [ARM] Don't form "ands" when it isn't scheduled correctly. In r322972/r323136, the iteration here was changed to catch cases at the beginning of a basic block... but we accidentally deleted an important safety check. Restore that check to the way it was. Fixes https://bugs.llvm.org/show_bug.cgi?id=41116 Differential Revision: https://reviews.llvm.org/D59680 This should fix "Assertion failed: (LiveCPSR && "CPSR liveness tracking is wrong!"), function UpdateCPSRUse" errors when building the devel/xwpe port for armv7. PR: 236062, 236568 MFC after: 1 month X-MFC-With: r344779 Modified: head/contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp Modified: head/contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp ============================================================================== --- head/contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp Sat Mar 23 13:41:14 2019 (r345448) +++ head/contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp Sat Mar 23 14:10:05 2019 (r345449) @@ -2824,7 +2824,15 @@ bool ARMBaseInstrInfo::optimizeCompareInstr( // change. We can't do this transformation. return false; - } while (I != B); + if (I == B) { + // In some cases, we scan the use-list of an instruction for an AND; + // that AND is in the same BB, but may not be scheduled before the + // corresponding TST. In that case, bail out. + // + // FIXME: We could try to reschedule the AND. + return false; + } + } while (true); // Return false if no candidates exist. if (!MI && !SubAdd)
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