Date: Tue, 31 Jan 2012 15:45:11 +0000 (UTC) From: Grzegorz Bernacki <gber@FreeBSD.org> To: src-committers@freebsd.org, svn-src-projects@freebsd.org Subject: svn commit: r230818 - projects/armv6/sys/arm/arm Message-ID: <201201311545.q0VFjB0f042758@svn.freebsd.org>
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Author: gber Date: Tue Jan 31 15:45:10 2012 New Revision: 230818 URL: http://svn.freebsd.org/changeset/base/230818 Log: pj4b: Add memory barriers to cache operations Submitted by: Lukasz Plachno Obtained from: Marvell, Semihalf Modified: projects/armv6/sys/arm/arm/cpufunc_asm_pj4b.S Modified: projects/armv6/sys/arm/arm/cpufunc_asm_pj4b.S ============================================================================== --- projects/armv6/sys/arm/arm/cpufunc_asm_pj4b.S Tue Jan 31 15:41:31 2012 (r230817) +++ projects/armv6/sys/arm/arm/cpufunc_asm_pj4b.S Tue Jan 31 15:45:10 2012 (r230818) @@ -75,6 +75,8 @@ ENTRY(pj4b_dcache_inv_range) and r2, r0, r3 add r1, r1, r2 bic r0, r0, r3 + + mcr p15, 0, r0, c7, c10, 5 /* Data Memory Barrier err:4413 */ 1: mcr p15, 0, r0, c7, c6, 1 add r0, r0, ip @@ -104,6 +106,8 @@ ENTRY(pj4b_idcache_wbinv_range) and r2, r0, r3 add r1, r1, r2 bic r0, r0, r3 + + mcr p15, 0, r0, c7, c10, 5 /* Data Memory Barrier err:4611 */ 1: #ifdef SMP /* Request for ownership */ @@ -126,6 +130,8 @@ ENTRY(pj4b_dcache_wbinv_range) and r2, r0, r3 add r1, r1, r2 bic r0, r0, r3 + + mcr p15, 0, r0, c7, c10, 5 /* Data Memory Barrier err:4611 */ 1: #ifdef SMP /* Request for ownership */ @@ -147,6 +153,8 @@ ENTRY(pj4b_dcache_wb_range) and r2, r0, r3 add r1, r1, r2 bic r0, r0, r3 + + mcr p15, 0, r0, c7, c10, 5 /* Data Memory Barrier err:4611 */ 1: #ifdef SMP /* Request for ownership */
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