Date: Mon, 31 Jul 2017 19:30:24 +0000 (UTC) From: Mark Johnston <markj@FreeBSD.org> To: src-committers@freebsd.org, svn-src-projects@freebsd.org Subject: svn commit: r321809 - in projects/numa2: . cddl/contrib/opensolaris/cmd/dtrace/test/tst/common/dtraceUtil contrib/hyperv/tools/scripts contrib/ipfilter contrib/libarchive/libarchive contrib/llvm/in... Message-ID: <201707311930.v6VJUOcd098510@repo.freebsd.org>
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Author: markj Date: Mon Jul 31 19:30:23 2017 New Revision: 321809 URL: https://svnweb.freebsd.org/changeset/base/321809 Log: MFH at r321808. Added: projects/numa2/contrib/hyperv/tools/scripts/hyperv_vfattach - copied unchanged from r321808, head/contrib/hyperv/tools/scripts/hyperv_vfattach projects/numa2/contrib/hyperv/tools/scripts/hyperv_vfup - copied unchanged from r321808, head/contrib/hyperv/tools/scripts/hyperv_vfup projects/numa2/sys/contrib/dev/acpica/compiler/aslparseop.c - copied unchanged from r321808, head/sys/contrib/dev/acpica/compiler/aslparseop.c projects/numa2/sys/contrib/dev/acpica/components/dispatcher/dspkginit.c - copied unchanged from r321808, head/sys/contrib/dev/acpica/components/dispatcher/dspkginit.c projects/numa2/sys/dev/iicbus/nxprtc.c - copied unchanged from r321808, head/sys/dev/iicbus/nxprtc.c Deleted: projects/numa2/sys/dev/iicbus/pcf8563.c projects/numa2/sys/dev/iicbus/pcf8563reg.h projects/numa2/sys/net/flowtable.c projects/numa2/sys/net/flowtable.h projects/numa2/usr.bin/netstat/flowtable.c Modified: projects/numa2/Makefile projects/numa2/Makefile.inc1 projects/numa2/UPDATING projects/numa2/cddl/contrib/opensolaris/cmd/dtrace/test/tst/common/dtraceUtil/tst.ZeroFunctionProbes.d.ksh projects/numa2/contrib/ipfilter/arc4random.c projects/numa2/contrib/libarchive/libarchive/archive_cryptor_private.h projects/numa2/contrib/libarchive/libarchive/archive_write_set_format_ar.c projects/numa2/contrib/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h projects/numa2/contrib/llvm/include/llvm/Support/CommandLine.h projects/numa2/contrib/llvm/include/llvm/Support/TargetRegistry.h projects/numa2/contrib/llvm/include/llvm/Transforms/Utils/LoopUtils.h projects/numa2/contrib/llvm/lib/CodeGen/CodeGenPrepare.cpp projects/numa2/contrib/llvm/lib/CodeGen/InlineSpiller.cpp projects/numa2/contrib/llvm/lib/CodeGen/RegAllocBase.cpp projects/numa2/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp projects/numa2/contrib/llvm/lib/Option/OptTable.cpp projects/numa2/contrib/llvm/lib/Support/CommandLine.cpp projects/numa2/contrib/llvm/lib/Support/ErrorHandling.cpp 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projects/numa2/sys/net/route.c projects/numa2/sys/netinet/cc/cc_cubic.c projects/numa2/sys/netinet/ip_output.c projects/numa2/sys/netinet6/ip6_output.c projects/numa2/sys/netipsec/ipsec.h projects/numa2/sys/netipsec/ipsec_input.c projects/numa2/sys/netipsec/ipsec_output.c projects/numa2/sys/nfs/nfs_fha.c projects/numa2/sys/nfs/nfs_fha.h projects/numa2/sys/nfs/nfs_nfssvc.c projects/numa2/sys/nfs/nfssvc.h projects/numa2/sys/sys/ata.h projects/numa2/sys/sys/clock.h projects/numa2/sys/sys/copyright.h projects/numa2/sys/sys/param.h projects/numa2/sys/sys/pctrie.h projects/numa2/sys/sys/taskqueue.h projects/numa2/sys/sys/time.h projects/numa2/sys/vm/vnode_pager.c projects/numa2/sys/vm/vnode_pager.h projects/numa2/sys/x86/x86/stack_machdep.c projects/numa2/tests/sys/geom/class/gate/ggate_test.sh projects/numa2/tools/tools/nanobsd/defaults.sh projects/numa2/tools/tools/nanobsd/legacy.sh projects/numa2/tools/tools/net80211/wlanwds/wlanwds.c projects/numa2/usr.bin/calendar/calendars/calendar.freebsd projects/numa2/usr.bin/netstat/Makefile projects/numa2/usr.bin/netstat/main.c projects/numa2/usr.bin/netstat/netstat.h projects/numa2/usr.bin/truss/syscalls.c projects/numa2/usr.bin/w/w.c projects/numa2/usr.sbin/acpi/acpidb/Makefile projects/numa2/usr.sbin/acpi/iasl/Makefile projects/numa2/usr.sbin/bhyve/pci_e82545.c projects/numa2/usr.sbin/bhyve/vga.c (contents, props changed) projects/numa2/usr.sbin/binmiscctl/binmiscctl.c projects/numa2/usr.sbin/bsdinstall/scripts/zfsboot projects/numa2/usr.sbin/mpsutil/mps_cmd.c projects/numa2/usr.sbin/prometheus_sysctl_exporter/prometheus_sysctl_exporter.c Directory Properties: projects/numa2/ (props changed) projects/numa2/cddl/ (props changed) projects/numa2/cddl/contrib/opensolaris/ (props changed) projects/numa2/contrib/compiler-rt/ (props changed) projects/numa2/contrib/ipfilter/ (props changed) projects/numa2/contrib/libarchive/ (props changed) projects/numa2/contrib/libc++/ (props changed) projects/numa2/contrib/llvm/ (props changed) projects/numa2/contrib/llvm/tools/clang/ (props changed) projects/numa2/contrib/llvm/tools/lld/ (props changed) projects/numa2/contrib/llvm/tools/lldb/ (props changed) projects/numa2/sys/contrib/dev/acpica/ (props changed) Modified: projects/numa2/Makefile ============================================================================== --- projects/numa2/Makefile Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/Makefile Mon Jul 31 19:30:23 2017 (r321809) @@ -441,14 +441,22 @@ TARGET_ARCHES_${target}?= ${target} MAKE_PARAMS_riscv?= CROSS_TOOLCHAIN=riscv64-gcc -# XXX Remove riscv from universe if the required toolchain package is missing. -.if !exists(/usr/local/share/toolchains/riscv64-gcc.mk) && ${TARGETS:Mriscv} -_UNIVERSE_TARGETS:= ${_UNIVERSE_TARGETS:Nriscv} -universe: universe_riscv_skip .PHONY -universe_epilogue: universe_riscv_skip .PHONY -universe_riscv_skip: universe_prologue .PHONY - @echo ">> riscv skipped - install riscv64-xtoolchain-gcc port or package to build" +# XXX Remove architectures only supported by external toolchain from universe +# if required toolchain packages are missing. +TOOLCHAINS_riscv= riscv64 +.for target in riscv +.if ${_UNIVERSE_TARGETS:M${target}} +.for toolchain in ${TOOLCHAINS_${target}} +.if !exists(/usr/local/share/toolchains/${toolchain}-gcc.mk) +_UNIVERSE_TARGETS:= ${_UNIVERSE_TARGETS:N${target}} +universe: universe_${toolchain}_skip .PHONY +universe_epilogue: universe_${toolchain}_skip .PHONY +universe_${toolchain}_skip: universe_prologue .PHONY + @echo ">> ${target} skipped - install ${toolchain}-xtoolchain-gcc port or package to build" .endif +.endfor +.endif +.endfor .if defined(UNIVERSE_TARGET) MAKE_JUST_WORLDS= YES Modified: projects/numa2/Makefile.inc1 ============================================================================== --- projects/numa2/Makefile.inc1 Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/Makefile.inc1 Mon Jul 31 19:30:23 2017 (r321809) @@ -624,8 +624,7 @@ XCFLAGS+= -isystem ${WORLDTMP}/usr/include -L${WORLDTM # combined with --sysroot. XCFLAGS+= -B${WORLDTMP}/usr/lib # Force using libc++ for external GCC. -# XXX: This should be checking MK_GNUCXX == no -.if ${X_COMPILER_VERSION} >= 40800 +.if ${X_COMPILER_TYPE} == gcc && ${X_COMPILER_VERSION} >= 40800 XCXXFLAGS+= -isystem ${WORLDTMP}/usr/include/c++/v1 -std=c++11 \ -nostdinc++ .endif Modified: projects/numa2/UPDATING ============================================================================== --- projects/numa2/UPDATING Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/UPDATING Mon Jul 31 19:30:23 2017 (r321809) @@ -51,6 +51,13 @@ NOTE TO PEOPLE WHO THINK THAT FreeBSD 12.x IS SLOW: ****************************** SPECIAL WARNING: ****************************** +20170728: + As of r321665, an NFSv4 server configuration that services + Kerberos mounts or clients that do not support the uid/gid in + owner/owner_group string capability, must explicitly enable + the nfsuserd daemon by adding nfsuserd_enable="YES" to the + machine's /etc/rc.conf file. + 20170722: Clang, llvm, lldb, compiler-rt and libc++ have been upgraded to 5.0.0. Please see the 20141231 entry below for information about prerequisites Modified: projects/numa2/cddl/contrib/opensolaris/cmd/dtrace/test/tst/common/dtraceUtil/tst.ZeroFunctionProbes.d.ksh ============================================================================== --- projects/numa2/cddl/contrib/opensolaris/cmd/dtrace/test/tst/common/dtraceUtil/tst.ZeroFunctionProbes.d.ksh Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/cddl/contrib/opensolaris/cmd/dtrace/test/tst/common/dtraceUtil/tst.ZeroFunctionProbes.d.ksh Mon Jul 31 19:30:23 2017 (r321809) @@ -39,6 +39,15 @@ ## +reader() +{ + while true + do + sleep 0.1 + cat /etc/motd > /dev/null + done +} + if [ $# != 1 ]; then echo expected one argument: '<'dtrace-path'>' exit 2 @@ -46,6 +55,9 @@ fi dtrace=$1 +reader & +child=$! + $dtrace -qZf wassup'{printf("Iamkool");}' \ -qf read'{printf("I am done"); exit(0);}' @@ -54,5 +66,7 @@ status=$? if [ "$status" -ne 0 ]; then echo $tst: dtrace failed fi + +kill $child exit $status Copied: projects/numa2/contrib/hyperv/tools/scripts/hyperv_vfattach (from r321808, head/contrib/hyperv/tools/scripts/hyperv_vfattach) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ projects/numa2/contrib/hyperv/tools/scripts/hyperv_vfattach Mon Jul 31 19:30:23 2017 (r321809, copy of r321808, head/contrib/hyperv/tools/scripts/hyperv_vfattach) @@ -0,0 +1,79 @@ +#!/bin/sh + +# +# If transparent VF is enabled, don't do anything. +# + +sysctl -n hw.hn.vf_transparent > /dev/null 2>&1 +if [ $? -ne 0 ] +then + # Old kernel; no transparent VF. + vf_transparent=0 +else + vf_transparent=`sysctl -n hw.hn.vf_transparent` +fi + +if [ $vf_transparent -ne 0 ] +then + # Transparent VF; done! + exit 0 +fi + +iface=$1 +delay=$2 + +if [ $delay -gt 0 ] +then + # + # Delayed VF up. + # + sleep $delay + ifconfig $iface up + # Done! + exit $? +fi + +# +# Check to see whether $iface is a VF or not. +# If $iface is a VF, bring it up now. +# + +# for hyperv_vf_delay +. /etc/rc.conf + +sysctl -n hw.hn.vflist > /dev/null 2>&1 +if [ $? -ne 0 ] +then + # Old kernel; nothing could be done properly. + exit 0 +fi +vf_list=`sysctl -n hw.hn.vflist` + +for vf in $vf_list +do + if [ $vf = $iface ] + then + # + # Linger a little bit (at least 2 seconds) mainly to + # make sure that $iface is fully attached. + # + # NOTE: + # In Azure hyperv_vf_delay should be configured to a + # large value, e.g. 120 seconds, to avoid racing cloud + # agent goofs. + # + test $hyperv_vf_delay -ge 2 > /dev/null 2>&1 + if [ $? -ne 0 ] + then + hyperv_vf_delay=2 + fi + # + # NOTE: + # "(sleep ..; ifconfig .. up) > /dev/null 2>&1 &" + # does _not_ work. + # + daemon -f /usr/libexec/hyperv/hyperv_vfattach \ + $iface $hyperv_vf_delay + break + fi +done Copied: projects/numa2/contrib/hyperv/tools/scripts/hyperv_vfup (from r321808, head/contrib/hyperv/tools/scripts/hyperv_vfup) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ projects/numa2/contrib/hyperv/tools/scripts/hyperv_vfup Mon Jul 31 19:30:23 2017 (r321809, copy of r321808, head/contrib/hyperv/tools/scripts/hyperv_vfup) @@ -0,0 +1,119 @@ +#!/bin/sh + +. /etc/rc.subr +. /etc/network.subr + +load_rc_config netif + +# +# Customized per-interface setup, e.g. hyperv_vfup.hn1 +# +# NOTE-CUSTOMIZE: +# Comment this out, if this script is used as template +# for the customized per-interface setup. +# +if [ -f /usr/libexec/hyperv/hyperv_vfup.$1 ] +then + /usr/libexec/hyperv/hyperv_vfup.$1 + exit $? +fi + +# NOTE-CUSTOMIZE: +#hn=${0##*.} +hn=$1 +hn_unit=`echo $hn | sed 's/[^0-9]*//g'` + +vf=`sysctl -n dev.hn.$hn_unit.vf` +if [ ! $vf ] +then + # Race happened; VF was removed, before we ran. + echo "$hn: VF was detached" + exit 0 +fi + +# +# Create laggX for hnX. +# Add VF and hnX to laggX. +# + +lagg=lagg$hn_unit + +ifconfig $lagg > /dev/null 2>&1 +if [ $? -ne 0 ] +then + # + # No laggX, create it now. + # + ifconfig $lagg create > /dev/null 2>&1 + if [ $? -ne 0 ] + then + echo "$lagg creation failed" + exit 1 + fi + + # + # Configure laggX (failover), add hnX and VF to it. + # + ifconfig $lagg laggproto failover laggport $hn laggport $vf + ifconfig $lagg inet6 no_dad + + # + # Stop dhclient on hnX, if any. + # + pidfile=/var/run/dhclient.$hn.pid + if [ -f $pidfile ] + then + kill -TERM `cat $pidfile` + fi + + # + # Remove all configured IPv4 addresses on hnX, e.g. + # configured by dhclient. laggX will take over the + # network operations. + # + while true + do + ifconfig $hn -alias > /dev/null 2>&1 + if [ $? -ne 0 ] + then + break + fi + done + + # TODO: Remove IPv6 addresses on hnX + + # + # Use hnX's configuration for laggX + # + # NOTE-CUSTOMIZE: + # If this script is used as template for the customized + # per-interface setup, replace this with whatever you + # want to do with the laggX. + # + if dhcpif $hn; + then + ifconfig $lagg up + if syncdhcpif $hn; + then + dhclient $lagg + else + dhclient -b $lagg + fi + else + ifconfig_args=`ifconfig_getargs $hn` + if [ -n "$ifconfig_args" ] + then + ifconfig $lagg $ifconfig_args + fi + fi +else + # + # laggX exists. Check whether VF was there or not. + # If VF was not added to laggX, add it now. + # + ifconfig $lagg | grep "laggport: $vf" > /dev/null 2>&1 + if [ $? -ne 0 ] + then + ifconfig $lagg laggport $vf + fi +fi Modified: projects/numa2/contrib/ipfilter/arc4random.c ============================================================================== --- projects/numa2/contrib/ipfilter/arc4random.c Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/contrib/ipfilter/arc4random.c Mon Jul 31 19:30:23 2017 (r321809) @@ -109,9 +109,9 @@ arc4_randomstir (void) /* * Throw away the first N words of output, as suggested in the * paper "Weaknesses in the Key Scheduling Algorithm of RC4" - * by Fluher, Mantin, and Shamir. (N = 256 in our case.) + * by Fluher, Mantin, and Shamir. (N = 768 in our case.) */ - for (n = 0; n < 256*4; n++) + for (n = 0; n < 768*4; n++) arc4_randbyte(); MUTEX_EXIT(&arc4_mtx); } Modified: projects/numa2/contrib/libarchive/libarchive/archive_cryptor_private.h ============================================================================== --- projects/numa2/contrib/libarchive/libarchive/archive_cryptor_private.h Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/contrib/libarchive/libarchive/archive_cryptor_private.h Mon Jul 31 19:30:23 2017 (r321809) @@ -64,7 +64,7 @@ typedef struct { } archive_crypto_ctx; #elif defined(_WIN32) && !defined(__CYGWIN__) && defined(HAVE_BCRYPT_H) -#include <Bcrypt.h> +#include <bcrypt.h> /* Common in other bcrypt implementations, but missing from VS2008. */ #ifndef BCRYPT_SUCCESS Modified: projects/numa2/contrib/libarchive/libarchive/archive_write_set_format_ar.c ============================================================================== --- projects/numa2/contrib/libarchive/libarchive/archive_write_set_format_ar.c Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/contrib/libarchive/libarchive/archive_write_set_format_ar.c Mon Jul 31 19:30:23 2017 (r321809) @@ -374,13 +374,14 @@ archive_write_ar_data(struct archive_write *a, const v return (ARCHIVE_WARN); } - ar->strtab = (char *)malloc(s); + ar->strtab = (char *)malloc(s + 1); if (ar->strtab == NULL) { archive_set_error(&a->archive, ENOMEM, "Can't allocate strtab buffer"); return (ARCHIVE_FATAL); } - strncpy(ar->strtab, buff, s); + memcpy(ar->strtab, buff, s); + ar->strtab[s] = '\0'; ar->has_strtab = 1; } Modified: projects/numa2/contrib/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h ============================================================================== --- projects/numa2/contrib/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/contrib/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h Mon Jul 31 19:30:23 2017 (r321809) @@ -40,7 +40,8 @@ class TargetRegisterInfo; /// This is convenient because std::bitset does not have a constructor /// with an initializer list of set bits. /// -/// Each InstructionSelector subclass should define a PredicateBitset class with: +/// Each InstructionSelector subclass should define a PredicateBitset class +/// with: /// const unsigned MAX_SUBTARGET_PREDICATES = 192; /// using PredicateBitset = PredicateBitsetImpl<MAX_SUBTARGET_PREDICATES>; /// and updating the constant to suit the target. Tablegen provides a suitable @@ -102,7 +103,8 @@ enum { /// - OpIdx - Operand index /// - Expected integer GIM_CheckConstantInt, - /// Check the operand is a specific literal integer (i.e. MO.isImm() or MO.isCImm() is true). + /// Check the operand is a specific literal integer (i.e. MO.isImm() or + /// MO.isCImm() is true). /// - InsnID - Instruction ID /// - OpIdx - Operand index /// - Expected integer Modified: projects/numa2/contrib/llvm/include/llvm/Support/CommandLine.h ============================================================================== --- projects/numa2/contrib/llvm/include/llvm/Support/CommandLine.h Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/contrib/llvm/include/llvm/Support/CommandLine.h Mon Jul 31 19:30:23 2017 (r321809) @@ -66,15 +66,12 @@ bool ParseCommandLineOptions(int argc, const char *con void ParseEnvironmentOptions(const char *progName, const char *envvar, const char *Overview = ""); -// Function pointer type for printing version information. -using VersionPrinterTy = std::function<void(raw_ostream &)>; - ///===---------------------------------------------------------------------===// /// SetVersionPrinter - Override the default (LLVM specific) version printer /// used to print out the version when --version is given /// on the command line. This allows other systems using the /// CommandLine utilities to print their own version string. -void SetVersionPrinter(VersionPrinterTy func); +void SetVersionPrinter(void (*func)()); ///===---------------------------------------------------------------------===// /// AddExtraVersionPrinter - Add an extra printer to use in addition to the @@ -83,7 +80,7 @@ void SetVersionPrinter(VersionPrinterTy func); /// which will be called after the basic LLVM version /// printing is complete. Each can then add additional /// information specific to the tool. -void AddExtraVersionPrinter(VersionPrinterTy func); +void AddExtraVersionPrinter(void (*func)()); // PrintOptionValues - Print option values. // With -print-options print the difference between option values and defaults. Modified: projects/numa2/contrib/llvm/include/llvm/Support/TargetRegistry.h ============================================================================== --- projects/numa2/contrib/llvm/include/llvm/Support/TargetRegistry.h Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/contrib/llvm/include/llvm/Support/TargetRegistry.h Mon Jul 31 19:30:23 2017 (r321809) @@ -599,7 +599,7 @@ struct TargetRegistry { /// printRegisteredTargetsForVersion - Print the registered targets /// appropriately for inclusion in a tool's version output. - static void printRegisteredTargetsForVersion(raw_ostream &OS); + static void printRegisteredTargetsForVersion(); /// @name Registry Access /// @{ Modified: projects/numa2/contrib/llvm/include/llvm/Transforms/Utils/LoopUtils.h ============================================================================== --- projects/numa2/contrib/llvm/include/llvm/Transforms/Utils/LoopUtils.h Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/contrib/llvm/include/llvm/Transforms/Utils/LoopUtils.h Mon Jul 31 19:30:23 2017 (r321809) @@ -531,8 +531,10 @@ Value *createTargetReduction(IRBuilder<> &B, const Tar /// Get the intersection (logical and) of all of the potential IR flags /// of each scalar operation (VL) that will be converted into a vector (I). +/// If OpValue is non-null, we only consider operations similar to OpValue +/// when intersecting. /// Flag set: NSW, NUW, exact, and all of fast-math. -void propagateIRFlags(Value *I, ArrayRef<Value *> VL); +void propagateIRFlags(Value *I, ArrayRef<Value *> VL, Value *OpValue = nullptr); } // end namespace llvm Modified: projects/numa2/contrib/llvm/lib/CodeGen/CodeGenPrepare.cpp ============================================================================== --- projects/numa2/contrib/llvm/lib/CodeGen/CodeGenPrepare.cpp Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/contrib/llvm/lib/CodeGen/CodeGenPrepare.cpp Mon Jul 31 19:30:23 2017 (r321809) @@ -4016,14 +4016,18 @@ static bool IsOperandAMemoryOperand(CallInst *CI, Inli return true; } +// Max number of memory uses to look at before aborting the search to conserve +// compile time. +static constexpr int MaxMemoryUsesToScan = 20; + /// Recursively walk all the uses of I until we find a memory use. /// If we find an obviously non-foldable instruction, return true. /// Add the ultimately found memory instructions to MemoryUses. static bool FindAllMemoryUses( Instruction *I, SmallVectorImpl<std::pair<Instruction *, unsigned>> &MemoryUses, - SmallPtrSetImpl<Instruction *> &ConsideredInsts, - const TargetLowering &TLI, const TargetRegisterInfo &TRI) { + SmallPtrSetImpl<Instruction *> &ConsideredInsts, const TargetLowering &TLI, + const TargetRegisterInfo &TRI, int SeenInsts = 0) { // If we already considered this instruction, we're done. if (!ConsideredInsts.insert(I).second) return false; @@ -4036,8 +4040,12 @@ static bool FindAllMemoryUses( // Loop over all the uses, recursively processing them. for (Use &U : I->uses()) { - Instruction *UserI = cast<Instruction>(U.getUser()); + // Conservatively return true if we're seeing a large number or a deep chain + // of users. This avoids excessive compilation times in pathological cases. + if (SeenInsts++ >= MaxMemoryUsesToScan) + return true; + Instruction *UserI = cast<Instruction>(U.getUser()); if (LoadInst *LI = dyn_cast<LoadInst>(UserI)) { MemoryUses.push_back(std::make_pair(LI, U.getOperandNo())); continue; @@ -4082,7 +4090,8 @@ static bool FindAllMemoryUses( continue; } - if (FindAllMemoryUses(UserI, MemoryUses, ConsideredInsts, TLI, TRI)) + if (FindAllMemoryUses(UserI, MemoryUses, ConsideredInsts, TLI, TRI, + SeenInsts)) return true; } Modified: projects/numa2/contrib/llvm/lib/CodeGen/InlineSpiller.cpp ============================================================================== --- projects/numa2/contrib/llvm/lib/CodeGen/InlineSpiller.cpp Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/contrib/llvm/lib/CodeGen/InlineSpiller.cpp Mon Jul 31 19:30:23 2017 (r321809) @@ -643,8 +643,11 @@ void InlineSpiller::reMaterializeAll() { Edit->eraseVirtReg(Reg); continue; } - assert((LIS.hasInterval(Reg) && !LIS.getInterval(Reg).empty()) && - "Reg with empty interval has reference"); + + assert(LIS.hasInterval(Reg) && + (!LIS.getInterval(Reg).empty() || !MRI.reg_nodbg_empty(Reg)) && + "Empty and not used live-range?!"); + RegsToSpill[ResultPos++] = Reg; } RegsToSpill.erase(RegsToSpill.begin() + ResultPos, RegsToSpill.end()); Modified: projects/numa2/contrib/llvm/lib/CodeGen/RegAllocBase.cpp ============================================================================== --- projects/numa2/contrib/llvm/lib/CodeGen/RegAllocBase.cpp Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/contrib/llvm/lib/CodeGen/RegAllocBase.cpp Mon Jul 31 19:30:23 2017 (r321809) @@ -133,18 +133,19 @@ void RegAllocBase::allocatePhysRegs() { if (AvailablePhysReg) Matrix->assign(*VirtReg, AvailablePhysReg); - for (VirtRegVec::iterator I = SplitVRegs.begin(), E = SplitVRegs.end(); - I != E; ++I) { - LiveInterval *SplitVirtReg = &LIS->getInterval(*I); + for (unsigned Reg : SplitVRegs) { + assert(LIS->hasInterval(Reg)); + + LiveInterval *SplitVirtReg = &LIS->getInterval(Reg); assert(!VRM->hasPhys(SplitVirtReg->reg) && "Register already assigned"); if (MRI->reg_nodbg_empty(SplitVirtReg->reg)) { + assert(SplitVirtReg->empty() && "Non-empty but used interval"); DEBUG(dbgs() << "not queueing unused " << *SplitVirtReg << '\n'); aboutToRemoveInterval(*SplitVirtReg); LIS->removeInterval(SplitVirtReg->reg); continue; } DEBUG(dbgs() << "queuing new interval: " << *SplitVirtReg << "\n"); - assert(!SplitVirtReg->empty() && "expecting non-empty interval"); assert(TargetRegisterInfo::isVirtualRegister(SplitVirtReg->reg) && "expect split value in virtual register"); enqueue(SplitVirtReg); Modified: projects/numa2/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp ============================================================================== --- projects/numa2/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp Mon Jul 31 19:30:23 2017 (r321809) @@ -2965,7 +2965,12 @@ static inline bool isSETCCorConvertedSETCC(SDValue N) else if (N.getOpcode() == ISD::SIGN_EXTEND) N = N.getOperand(0); - return (N.getOpcode() == ISD::SETCC); + if (isLogicalMaskOp(N.getOpcode())) + return isSETCCorConvertedSETCC(N.getOperand(0)) && + isSETCCorConvertedSETCC(N.getOperand(1)); + + return (N.getOpcode() == ISD::SETCC || + ISD::isBuildVectorOfConstantSDNodes(N.getNode())); } #endif @@ -2973,28 +2978,20 @@ static inline bool isSETCCorConvertedSETCC(SDValue N) // to ToMaskVT if needed with vector extension or truncation. SDValue DAGTypeLegalizer::convertMask(SDValue InMask, EVT MaskVT, EVT ToMaskVT) { - LLVMContext &Ctx = *DAG.getContext(); - // Currently a SETCC or a AND/OR/XOR with two SETCCs are handled. - unsigned InMaskOpc = InMask->getOpcode(); - // FIXME: This code seems to be too restrictive, we might consider // generalizing it or dropping it. - assert((InMaskOpc == ISD::SETCC || - ISD::isBuildVectorOfConstantSDNodes(InMask.getNode()) || - (isLogicalMaskOp(InMaskOpc) && - isSETCCorConvertedSETCC(InMask->getOperand(0)) && - isSETCCorConvertedSETCC(InMask->getOperand(1)))) && - "Unexpected mask argument."); + assert(isSETCCorConvertedSETCC(InMask) && "Unexpected mask argument."); // Make a new Mask node, with a legal result VT. SmallVector<SDValue, 4> Ops; for (unsigned i = 0; i < InMask->getNumOperands(); ++i) Ops.push_back(InMask->getOperand(i)); - SDValue Mask = DAG.getNode(InMaskOpc, SDLoc(InMask), MaskVT, Ops); + SDValue Mask = DAG.getNode(InMask->getOpcode(), SDLoc(InMask), MaskVT, Ops); // If MaskVT has smaller or bigger elements than ToMaskVT, a vector sign // extend or truncate is needed. + LLVMContext &Ctx = *DAG.getContext(); unsigned MaskScalarBits = MaskVT.getScalarSizeInBits(); unsigned ToMaskScalBits = ToMaskVT.getScalarSizeInBits(); if (MaskScalarBits < ToMaskScalBits) { Modified: projects/numa2/contrib/llvm/lib/Option/OptTable.cpp ============================================================================== --- projects/numa2/contrib/llvm/lib/Option/OptTable.cpp Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/contrib/llvm/lib/Option/OptTable.cpp Mon Jul 31 19:30:23 2017 (r321809) @@ -235,7 +235,9 @@ OptTable::findByPrefix(StringRef Cur, unsigned short D continue; for (int I = 0; In.Prefixes[I]; I++) { - std::string S = std::string(In.Prefixes[I]) + std::string(In.Name); + std::string S = std::string(In.Prefixes[I]) + std::string(In.Name) + "\t"; + if (In.HelpText) + S += In.HelpText; if (StringRef(S).startswith(Cur)) Ret.push_back(S); } Modified: projects/numa2/contrib/llvm/lib/Support/CommandLine.cpp ============================================================================== --- projects/numa2/contrib/llvm/lib/Support/CommandLine.cpp Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/contrib/llvm/lib/Support/CommandLine.cpp Mon Jul 31 19:30:23 2017 (r321809) @@ -2039,9 +2039,9 @@ void CommandLineParser::printOptionValues() { Opts[i].second->printOptionValue(MaxArgLen, PrintAllOptions); } -static VersionPrinterTy OverrideVersionPrinter = nullptr; +static void (*OverrideVersionPrinter)() = nullptr; -static std::vector<VersionPrinterTy> *ExtraVersionPrinters = nullptr; +static std::vector<void (*)()> *ExtraVersionPrinters = nullptr; namespace { class VersionPrinter { @@ -2081,7 +2081,7 @@ class VersionPrinter { (public) return; if (OverrideVersionPrinter != nullptr) { - OverrideVersionPrinter(outs()); + (*OverrideVersionPrinter)(); exit(0); } print(); @@ -2090,8 +2090,10 @@ class VersionPrinter { (public) // information. if (ExtraVersionPrinters != nullptr) { outs() << '\n'; - for (auto I : *ExtraVersionPrinters) - I(outs()); + for (std::vector<void (*)()>::iterator I = ExtraVersionPrinters->begin(), + E = ExtraVersionPrinters->end(); + I != E; ++I) + (*I)(); } exit(0); @@ -2129,11 +2131,11 @@ void cl::PrintHelpMessage(bool Hidden, bool Categorize /// Utility function for printing version number. void cl::PrintVersionMessage() { VersionPrinterInstance.print(); } -void cl::SetVersionPrinter(VersionPrinterTy func) { OverrideVersionPrinter = func; } +void cl::SetVersionPrinter(void (*func)()) { OverrideVersionPrinter = func; } -void cl::AddExtraVersionPrinter(VersionPrinterTy func) { +void cl::AddExtraVersionPrinter(void (*func)()) { if (!ExtraVersionPrinters) - ExtraVersionPrinters = new std::vector<VersionPrinterTy>; + ExtraVersionPrinters = new std::vector<void (*)()>; ExtraVersionPrinters->push_back(func); } Modified: projects/numa2/contrib/llvm/lib/Support/ErrorHandling.cpp ============================================================================== --- projects/numa2/contrib/llvm/lib/Support/ErrorHandling.cpp Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/contrib/llvm/lib/Support/ErrorHandling.cpp Mon Jul 31 19:30:23 2017 (r321809) @@ -169,7 +169,8 @@ void llvm::report_bad_alloc_error(const char *Reason, // Don't call the normal error handler. It may allocate memory. Directly write // an OOM to stderr and abort. char OOMMessage[] = "LLVM ERROR: out of memory\n"; - (void)::write(2, OOMMessage, strlen(OOMMessage)); + ssize_t written = ::write(2, OOMMessage, strlen(OOMMessage)); + (void)written; abort(); #endif } Modified: projects/numa2/contrib/llvm/lib/Support/TargetRegistry.cpp ============================================================================== --- projects/numa2/contrib/llvm/lib/Support/TargetRegistry.cpp Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/contrib/llvm/lib/Support/TargetRegistry.cpp Mon Jul 31 19:30:23 2017 (r321809) @@ -114,7 +114,7 @@ static int TargetArraySortFn(const std::pair<StringRef return LHS->first.compare(RHS->first); } -void TargetRegistry::printRegisteredTargetsForVersion(raw_ostream &OS) { +void TargetRegistry::printRegisteredTargetsForVersion() { std::vector<std::pair<StringRef, const Target*> > Targets; size_t Width = 0; for (const auto &T : TargetRegistry::targets()) { @@ -123,6 +123,7 @@ void TargetRegistry::printRegisteredTargetsForVersion( } array_pod_sort(Targets.begin(), Targets.end(), TargetArraySortFn); + raw_ostream &OS = outs(); OS << " Registered Targets:\n"; for (unsigned i = 0, e = Targets.size(); i != e; ++i) { OS << " " << Targets[i].first; Modified: projects/numa2/contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp ============================================================================== --- projects/numa2/contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp Mon Jul 31 19:30:23 2017 (r321809) @@ -2889,9 +2889,12 @@ void AArch64TargetLowering::saveVarArgRegisters(CCStat unsigned GPRSaveSize = 8 * (NumGPRArgRegs - FirstVariadicGPR); int GPRIdx = 0; if (GPRSaveSize != 0) { - if (IsWin64) + if (IsWin64) { GPRIdx = MFI.CreateFixedObject(GPRSaveSize, -(int)GPRSaveSize, false); - else + if (GPRSaveSize & 15) + // The extra size here, if triggered, will always be 8. + MFI.CreateFixedObject(16 - (GPRSaveSize & 15), -(int)alignTo(GPRSaveSize, 16), false); + } else GPRIdx = MFI.CreateStackObject(GPRSaveSize, 8, false); SDValue FIN = DAG.getFrameIndex(GPRIdx, PtrVT); Modified: projects/numa2/contrib/llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp ============================================================================== --- projects/numa2/contrib/llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/contrib/llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp Mon Jul 31 19:30:23 2017 (r321809) @@ -297,6 +297,11 @@ void AMDGPUInstPrinter::printRegOperand(unsigned RegNo case AMDGPU::FLAT_SCR_HI: O << "flat_scratch_hi"; return; + case AMDGPU::FP_REG: + case AMDGPU::SP_REG: + case AMDGPU::SCRATCH_WAVE_OFFSET_REG: + case AMDGPU::PRIVATE_RSRC_REG: + llvm_unreachable("pseudo-register should not ever be emitted"); default: break; } Modified: projects/numa2/contrib/llvm/lib/Target/AMDGPU/SIRegisterInfo.td ============================================================================== --- projects/numa2/contrib/llvm/lib/Target/AMDGPU/SIRegisterInfo.td Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/contrib/llvm/lib/Target/AMDGPU/SIRegisterInfo.td Mon Jul 31 19:30:23 2017 (r321809) @@ -274,8 +274,7 @@ def VGPR_512 : RegisterTuples<[sub0, sub1, sub2, sub3, def SReg_32_XM0_XEXEC : RegisterClass<"AMDGPU", [i32, f32, i16, f16, v2i16, v2f16], 32, (add SGPR_32, VCC_LO, VCC_HI, FLAT_SCR_LO, FLAT_SCR_HI, TTMP_32, TMA_LO, TMA_HI, TBA_LO, TBA_HI, SRC_SHARED_BASE, SRC_SHARED_LIMIT, - SRC_PRIVATE_BASE, SRC_PRIVATE_LIMIT, - FP_REG, SP_REG, SCRATCH_WAVE_OFFSET_REG)> { + SRC_PRIVATE_BASE, SRC_PRIVATE_LIMIT)> { let AllocationPriority = 7; } Modified: projects/numa2/contrib/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp ============================================================================== --- projects/numa2/contrib/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/contrib/llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp Mon Jul 31 19:30:23 2017 (r321809) @@ -61,14 +61,6 @@ static unsigned adjustFixupValue(unsigned Kind, uint64 case Sparc::fixup_sparc_lo10: return Value & 0x3ff; - case Sparc::fixup_sparc_tls_ldo_hix22: - case Sparc::fixup_sparc_tls_le_hix22: - return (~Value >> 10) & 0x3fffff; - - case Sparc::fixup_sparc_tls_ldo_lox10: - case Sparc::fixup_sparc_tls_le_lox10: - return (~(~Value & 0x3ff)) & 0x1fff; - case Sparc::fixup_sparc_h44: return (Value >> 22) & 0x3fffff; @@ -83,6 +75,13 @@ static unsigned adjustFixupValue(unsigned Kind, uint64 case Sparc::fixup_sparc_hm: return (Value >> 32) & 0x3ff; + + case Sparc::fixup_sparc_tls_ldo_hix22: + case Sparc::fixup_sparc_tls_le_hix22: + case Sparc::fixup_sparc_tls_ldo_lox10: + case Sparc::fixup_sparc_tls_le_lox10: + assert(Value == 0 && "Sparc TLS relocs expect zero Value"); + return 0; case Sparc::fixup_sparc_tls_gd_add: case Sparc::fixup_sparc_tls_gd_call: Modified: projects/numa2/contrib/llvm/lib/Target/SystemZ/SystemZScheduleZ14.td ============================================================================== --- projects/numa2/contrib/llvm/lib/Target/SystemZ/SystemZScheduleZ14.td Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/contrib/llvm/lib/Target/SystemZ/SystemZScheduleZ14.td Mon Jul 31 19:30:23 2017 (r321809) @@ -455,10 +455,10 @@ def : InstRW<[FXa, LSU, Lat8], (instregex "MH(Y)?$")>; def : InstRW<[FXa2, Lat6, GroupAlone], (instregex "M(L)?R$")>; def : InstRW<[FXa2, LSU, Lat10, GroupAlone], (instregex "M(FY|L)?$")>; def : InstRW<[FXa, LSU, Lat8], (instregex "MGH$")>; -def : InstRW<[FXa, LSU, Lat12, GroupAlone], (instregex "MG$")>; -def : InstRW<[FXa, Lat8, GroupAlone], (instregex "MGRK$")>; -def : InstRW<[FXa, LSU, Lat9, GroupAlone], (instregex "MSC$")>; -def : InstRW<[FXa, LSU, Lat11, GroupAlone], (instregex "MSGC$")>; +def : InstRW<[FXa, FXa, LSU, Lat12, GroupAlone], (instregex "MG$")>; +def : InstRW<[FXa, FXa, Lat8, GroupAlone], (instregex "MGRK$")>; +def : InstRW<[FXa, LSU, Lat9], (instregex "MSC$")>; +def : InstRW<[FXa, LSU, Lat11], (instregex "MSGC$")>; def : InstRW<[FXa, Lat5], (instregex "MSRKC$")>; def : InstRW<[FXa, Lat7], (instregex "MSGRKC$")>; @@ -620,7 +620,7 @@ def : InstRW<[FXa, Lat30], (instregex "(PCC|PPNO|PRNO) def : InstRW<[LSU], (instregex "LGG$")>; def : InstRW<[LSU, Lat5], (instregex "LLGFSG$")>; -def : InstRW<[LSU, Lat30, GroupAlone], (instregex "(L|ST)GSC$")>; +def : InstRW<[LSU, Lat30], (instregex "(L|ST)GSC$")>; //===----------------------------------------------------------------------===// // Decimal arithmetic @@ -708,7 +708,7 @@ def : InstRW<[FXb, LSU, Lat5], (instregex "NTSTG$")>; // Processor assist //===----------------------------------------------------------------------===// -def : InstRW<[FXb], (instregex "PPA$")>; +def : InstRW<[FXb, GroupAlone], (instregex "PPA$")>; //===----------------------------------------------------------------------===// // Miscellaneous Instructions. @@ -1276,9 +1276,9 @@ def : InstRW<[VecXsPm], (instregex "VESRL(B|F|G|H)?$") def : InstRW<[VecXsPm], (instregex "VESRLV(B|F|G|H)?$")>; def : InstRW<[VecXsPm], (instregex "VSL(DB)?$")>; -def : InstRW<[VecXsPm, VecXsPm, Lat8], (instregex "VSLB$")>; +def : InstRW<[VecXsPm], (instregex "VSLB$")>; def : InstRW<[VecXsPm], (instregex "VSR(A|L)$")>; -def : InstRW<[VecXsPm, VecXsPm, Lat8], (instregex "VSR(A|L)B$")>; +def : InstRW<[VecXsPm], (instregex "VSR(A|L)B$")>; def : InstRW<[VecXsPm], (instregex "VSB(I|IQ|CBI|CBIQ)?$")>; def : InstRW<[VecXsPm], (instregex "VSCBI(B|F|G|H|Q)?$")>; @@ -1435,9 +1435,9 @@ def : InstRW<[VecStr, Lat5], (instregex "VSTRCZ(B|F|H) // Vector: Packed-decimal instructions //===----------------------------------------------------------------------===// -def : InstRW<[VecDF, VecDF, Lat10, GroupAlone], (instregex "VLIP$")>; -def : InstRW<[VecDFX, LSU, Lat12, GroupAlone], (instregex "VPKZ$")>; -def : InstRW<[VecDFX, FXb, LSU, Lat12, GroupAlone], (instregex "VUPKZ$")>; +def : InstRW<[VecDF, VecDF, Lat10], (instregex "VLIP$")>; +def : InstRW<[VecDFX, LSU, GroupAlone], (instregex "VPKZ$")>; +def : InstRW<[VecDFX, FXb, LSU, Lat12, BeginGroup], (instregex "VUPKZ$")>; def : InstRW<[VecDF, VecDF, FXb, Lat20, GroupAlone], (instregex "VCVB(G)?$")>; def : InstRW<[VecDF, VecDF, FXb, Lat20, GroupAlone], (instregex "VCVD(G)?$")>; def : InstRW<[VecDFX], (instregex "V(A|S)P$")>; Modified: projects/numa2/contrib/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp ============================================================================== --- projects/numa2/contrib/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/contrib/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp Mon Jul 31 19:30:23 2017 (r321809) @@ -1055,7 +1055,10 @@ static bool foldMaskAndShiftToScale(SelectionDAG &DAG, // Scale the leading zero count down based on the actual size of the value. // Also scale it down based on the size of the shift. - MaskLZ -= (64 - X.getSimpleValueType().getSizeInBits()) + ShiftAmt; + unsigned ScaleDown = (64 - X.getSimpleValueType().getSizeInBits()) + ShiftAmt; + if (MaskLZ < ScaleDown) + return true; + MaskLZ -= ScaleDown; // The final check is to ensure that any masked out high bits of X are // already known to be zero. Otherwise, the mask has a semantic impact Modified: projects/numa2/contrib/llvm/lib/Target/X86/X86ISelLowering.cpp ============================================================================== --- projects/numa2/contrib/llvm/lib/Target/X86/X86ISelLowering.cpp Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/contrib/llvm/lib/Target/X86/X86ISelLowering.cpp Mon Jul 31 19:30:23 2017 (r321809) @@ -1672,8 +1672,8 @@ X86TargetLowering::X86TargetLowering(const X86TargetMa // TODO: These control memcmp expansion in CGP and could be raised higher, but // that needs to benchmarked and balanced with the potential use of vector - // load/store types (PR33329). - MaxLoadsPerMemcmp = 4; + // load/store types (PR33329, PR33914). + MaxLoadsPerMemcmp = 2; MaxLoadsPerMemcmpOptSize = 2; // Set loop alignment to 2^ExperimentalPrefLoopAlignment bytes (default: 2^4). @@ -22022,8 +22022,9 @@ static SDValue LowerScalarImmediateShift(SDValue Op, S return getTargetVShiftByConstNode(X86Opc, dl, VT, R, ShiftAmt, DAG); // i64 SRA needs to be performed as partial shifts. - if ((VT == MVT::v2i64 || (Subtarget.hasInt256() && VT == MVT::v4i64)) && - Op.getOpcode() == ISD::SRA && !Subtarget.hasXOP()) + if (((!Subtarget.hasXOP() && VT == MVT::v2i64) || + (Subtarget.hasInt256() && VT == MVT::v4i64)) && + Op.getOpcode() == ISD::SRA) return ArithmeticShiftRight64(ShiftAmt); if (VT == MVT::v16i8 || Modified: projects/numa2/contrib/llvm/lib/Transforms/Scalar/JumpThreading.cpp ============================================================================== --- projects/numa2/contrib/llvm/lib/Transforms/Scalar/JumpThreading.cpp Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/contrib/llvm/lib/Transforms/Scalar/JumpThreading.cpp Mon Jul 31 19:30:23 2017 (r321809) @@ -64,6 +64,11 @@ ImplicationSearchThreshold( "condition to use to thread over a weaker condition"), cl::init(3), cl::Hidden); +static cl::opt<bool> PrintLVIAfterJumpThreading( + "print-lvi-after-jump-threading", + cl::desc("Print the LazyValueInfo cache after JumpThreading"), cl::init(false), + cl::Hidden); + namespace { /// This pass performs 'jump threading', which looks at blocks that have /// multiple predecessors and multiple successors. If one or more of the @@ -93,9 +98,10 @@ namespace { bool runOnFunction(Function &F) override; void getAnalysisUsage(AnalysisUsage &AU) const override { + if (PrintLVIAfterJumpThreading) + AU.addRequired<DominatorTreeWrapperPass>(); AU.addRequired<AAResultsWrapperPass>(); AU.addRequired<LazyValueInfoWrapperPass>(); - AU.addPreserved<LazyValueInfoWrapperPass>(); AU.addPreserved<GlobalsAAWrapperPass>(); AU.addRequired<TargetLibraryInfoWrapperPass>(); } @@ -137,8 +143,14 @@ bool JumpThreading::runOnFunction(Function &F) { BFI.reset(new BlockFrequencyInfo(F, *BPI, LI)); } - return Impl.runImpl(F, TLI, LVI, AA, HasProfileData, std::move(BFI), - std::move(BPI)); + bool Changed = Impl.runImpl(F, TLI, LVI, AA, HasProfileData, std::move(BFI), + std::move(BPI)); + if (PrintLVIAfterJumpThreading) { + dbgs() << "LVI for function '" << F.getName() << "':\n"; + LVI->printLVI(F, getAnalysis<DominatorTreeWrapperPass>().getDomTree(), + dbgs()); + } + return Changed; } PreservedAnalyses JumpThreadingPass::run(Function &F, @@ -231,13 +243,15 @@ bool JumpThreadingPass::runImpl(Function &F, TargetLib // Can't thread an unconditional jump, but if the block is "almost // empty", we can replace uses of it with uses of the successor and make // this dead. - // We should not eliminate the loop header either, because eliminating - // a loop header might later prevent LoopSimplify from transforming nested - // loops into simplified form. + // We should not eliminate the loop header or latch either, because + // eliminating a loop header or latch might later prevent LoopSimplify + // from transforming nested loops into simplified form. We will rely on + // later passes in backend to clean up empty blocks. if (BI && BI->isUnconditional() && BB != &BB->getParent()->getEntryBlock() && // If the terminator is the only non-phi instruction, try to nuke it. - BB->getFirstNonPHIOrDbg()->isTerminator() && !LoopHeaders.count(BB)) { + BB->getFirstNonPHIOrDbg()->isTerminator() && !LoopHeaders.count(BB) && + !LoopHeaders.count(BI->getSuccessor(0))) { // FIXME: It is always conservatively correct to drop the info // for a block even if it doesn't get erased. This isn't totally // awesome, but it allows us to use AssertingVH to prevent nasty Modified: projects/numa2/contrib/llvm/lib/Transforms/Utils/LoopUtils.cpp ============================================================================== --- projects/numa2/contrib/llvm/lib/Transforms/Utils/LoopUtils.cpp Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/contrib/llvm/lib/Transforms/Utils/LoopUtils.cpp Mon Jul 31 19:30:23 2017 (r321809) @@ -1376,16 +1376,21 @@ Value *llvm::createTargetReduction(IRBuilder<> &Builde } } -void llvm::propagateIRFlags(Value *I, ArrayRef<Value *> VL) { - if (auto *VecOp = dyn_cast<Instruction>(I)) { - if (auto *I0 = dyn_cast<Instruction>(VL[0])) { - // VecOVp is initialized to the 0th scalar, so start counting from index - // '1'. - VecOp->copyIRFlags(I0); - for (int i = 1, e = VL.size(); i < e; ++i) { - if (auto *Scalar = dyn_cast<Instruction>(VL[i])) - VecOp->andIRFlags(Scalar); - } - } +void llvm::propagateIRFlags(Value *I, ArrayRef<Value *> VL, Value *OpValue) { + auto *VecOp = dyn_cast<Instruction>(I); + if (!VecOp) + return; + auto *Intersection = (OpValue == nullptr) ? dyn_cast<Instruction>(VL[0]) + : dyn_cast<Instruction>(OpValue); + if (!Intersection) + return; + const unsigned Opcode = Intersection->getOpcode(); + VecOp->copyIRFlags(Intersection); + for (auto *V : VL) { + auto *Instr = dyn_cast<Instruction>(V); + if (!Instr) + continue; + if (OpValue == nullptr || Opcode == Instr->getOpcode()) + VecOp->andIRFlags(V); } } Modified: projects/numa2/contrib/llvm/lib/Transforms/Utils/SimplifyCFG.cpp ============================================================================== --- projects/numa2/contrib/llvm/lib/Transforms/Utils/SimplifyCFG.cpp Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/contrib/llvm/lib/Transforms/Utils/SimplifyCFG.cpp Mon Jul 31 19:30:23 2017 (r321809) @@ -5656,20 +5656,22 @@ static bool TryToMergeLandingPad(LandingPadInst *LPad, bool SimplifyCFGOpt::SimplifyUncondBranch(BranchInst *BI, IRBuilder<> &Builder) { BasicBlock *BB = BI->getParent(); + BasicBlock *Succ = BI->getSuccessor(0); if (SinkCommon && SinkThenElseCodeToEnd(BI)) return true; // If the Terminator is the only non-phi instruction, simplify the block. - // if LoopHeader is provided, check if the block is a loop header - // (This is for early invocations before loop simplify and vectorization - // to keep canonical loop forms for nested loops. - // These blocks can be eliminated when the pass is invoked later - // in the back-end.) + // if LoopHeader is provided, check if the block or its successor is a loop + // header (This is for early invocations before loop simplify and + // vectorization to keep canonical loop forms for nested loops. These blocks + // can be eliminated when the pass is invoked later in the back-end.) + bool NeedCanonicalLoop = + !LateSimplifyCFG && + (LoopHeaders && (LoopHeaders->count(BB) || LoopHeaders->count(Succ))); BasicBlock::iterator I = BB->getFirstNonPHIOrDbg()->getIterator(); if (I->isTerminator() && BB != &BB->getParent()->getEntryBlock() && - (!LoopHeaders || !LoopHeaders->count(BB)) && - TryToSimplifyUncondBranchFromEmptyBlock(BB)) + !NeedCanonicalLoop && TryToSimplifyUncondBranchFromEmptyBlock(BB)) return true; // If the only instruction in the block is a seteq/setne comparison Modified: projects/numa2/contrib/llvm/tools/clang/include/clang/AST/Type.h ============================================================================== --- projects/numa2/contrib/llvm/tools/clang/include/clang/AST/Type.h Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/contrib/llvm/tools/clang/include/clang/AST/Type.h Mon Jul 31 19:30:23 2017 (r321809) @@ -1752,6 +1752,7 @@ class Type : public ExtQualsTypeCommonBase { (public) bool isTemplateTypeParmType() const; // C++ template type parameter bool isNullPtrType() const; // C++11 std::nullptr_t bool isAlignValT() const; // C++17 std::align_val_t + bool isStdByteType() const; // C++17 std::byte bool isAtomicType() const; // C11 _Atomic() #define IMAGE_TYPE(ImgType, Id, SingletonId, Access, Suffix) \ Modified: projects/numa2/contrib/llvm/tools/clang/lib/AST/StmtProfile.cpp ============================================================================== --- projects/numa2/contrib/llvm/tools/clang/lib/AST/StmtProfile.cpp Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/contrib/llvm/tools/clang/lib/AST/StmtProfile.cpp Mon Jul 31 19:30:23 2017 (r321809) @@ -1388,6 +1388,15 @@ static Stmt::StmtClass DecodeOperatorCall(const CXXOpe llvm_unreachable("Invalid overloaded operator expression"); } +#if defined(_MSC_VER) +#if _MSC_VER == 1911 +// Work around https://developercommunity.visualstudio.com/content/problem/84002/clang-cl-when-built-with-vc-2017-crashes-cause-vc.html +// MSVC 2017 update 3 miscompiles this function, and a clang built with it +// will crash in stage 2 of a bootstrap build. +#pragma optimize("", off) +#endif +#endif + void StmtProfiler::VisitCXXOperatorCallExpr(const CXXOperatorCallExpr *S) { if (S->isTypeDependent()) { // Type-dependent operator calls are profiled like their underlying @@ -1419,6 +1428,12 @@ void StmtProfiler::VisitCXXOperatorCallExpr(const CXXO VisitCallExpr(S); ID.AddInteger(S->getOperator()); } + +#if defined(_MSC_VER) +#if _MSC_VER == 1911 +#pragma optimize("", on) +#endif +#endif void StmtProfiler::VisitCXXMemberCallExpr(const CXXMemberCallExpr *S) { VisitCallExpr(S); Modified: projects/numa2/contrib/llvm/tools/clang/lib/AST/Type.cpp ============================================================================== --- projects/numa2/contrib/llvm/tools/clang/lib/AST/Type.cpp Mon Jul 31 19:18:48 2017 (r321808) +++ projects/numa2/contrib/llvm/tools/clang/lib/AST/Type.cpp Mon Jul 31 19:30:23 2017 (r321809) @@ -2313,6 +2313,15 @@ bool Type::isAlignValT() const { return false; } *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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