Date: Tue, 18 Nov 2025 18:02:41 +0000 From: Andrew Turner <andrew@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Subject: git: a695ac2ce8bc - main - arm64: Move intr_pic_init_secondary earlier Message-ID: <691cb4c1.220bb.22f9ecf6@gitrepo.freebsd.org>
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The branch main has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=a695ac2ce8bc8e8b989359002659063f2e056dcf commit a695ac2ce8bc8e8b989359002659063f2e056dcf Author: Andrew Turner <andrew@FreeBSD.org> AuthorDate: 2025-11-18 18:00:32 +0000 Commit: Andrew Turner <andrew@FreeBSD.org> CommitDate: 2025-11-18 18:00:32 +0000 arm64: Move intr_pic_init_secondary earlier This may have been called after intr_irq_shuffle. For most interrupt controllers this appears to be safe, however for the GICv5 we need to read a per-CPU ID register before we can assign interrupts to a given CPU. Fix the race by moving intr_pic_init_secondary earlier in the boot, after devices have been enumerated and before the interrupts are moved to their assigned CPUs. Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D53685 --- sys/arm64/arm64/mp_machdep.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sys/arm64/arm64/mp_machdep.c b/sys/arm64/arm64/mp_machdep.c index 0bdd2ecfd8a7..ba673ce9d6ee 100644 --- a/sys/arm64/arm64/mp_machdep.c +++ b/sys/arm64/arm64/mp_machdep.c @@ -270,6 +270,8 @@ init_secondary(uint64_t cpu) install_cpu_errata(); enable_cpu_feat(CPU_FEAT_AFTER_DEV); + intr_pic_init_secondary(); + /* Signal we are done */ atomic_add_int(&aps_started, 1); @@ -288,8 +290,6 @@ init_secondary(uint64_t cpu) ("pmap0 doesn't match cpu %ld's ttbr0", cpu)); pcpup->pc_curpmap = pmap0; - intr_pic_init_secondary(); - /* Start per-CPU event timers. */ cpu_initclocks_ap();help
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