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Date:      Fri, 23 Oct 1998 22:40:56 +1000
From:      Bruce Evans <bde@zeta.org.au>
To:        bde@zeta.org.au, Don.Lewis@tsc.tdk.com
Cc:        current@FreeBSD.ORG
Subject:   Re: gnu/usr.bin/cc/cc_tools/Makefile bug? (was Re: filesystem safety and SCSI disk write caching)
Message-ID:  <199810231240.WAA31913@godzilla.zeta.org.au>

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>} >Is it possible for make to determin that all the files will be built
>} >together? If so, then make  could be fixed to avoid running these
>} >commands multiple times in the parallel case.
>} 
>} No.  Not without telling it using something like .ORDER.
>
>What if the commands to build the targets don't reference .TARGET, .PREFIX,
>and so on?  Even .PREFIX should be OK if all the targets have the same
>prefix.

.TARGET only works if there is a single target, and .PREFIX only works
properly in implicit rules (with a single target), so there is normally
no problem when they are used.  Otherwise, make doesn't handle multiple
targets created by a single rule.

I suppose `make' could handle cases where lexically identical rules are
used to build multiple targets:

---
all: foo bar
foo bar:
	>foo
	>bar
---

`make -j2' could try running the common rule non-concurrently to see if
it updates foo and bar.  `make' doesn't do this.

Bruce

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