Date: Tue, 31 Jan 2012 15:46:30 +0000 (UTC) From: Grzegorz Bernacki <gber@FreeBSD.org> To: src-committers@freebsd.org, svn-src-projects@freebsd.org Subject: svn commit: r230819 - projects/armv6/sys/arm/mv Message-ID: <201201311546.q0VFkUoL042833@svn.freebsd.org>
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Author: gber Date: Tue Jan 31 15:46:29 2012 New Revision: 230819 URL: http://svn.freebsd.org/changeset/base/230819 Log: mpic: Fix IPI sending - Change Target List Filter to All And Self from All No Self (val = 0x00000000), sending interrupt to core causing it should not be disabled by default - CPUISSET return 1 if core is present in cpuset structure, so should not be negated - Remove setting all cores as signal receivers (ipi | 0xf00) Submitted by: Lukasz Plachno Obtained from: Marvell, Semihalf Modified: projects/armv6/sys/arm/mv/mpic.c Modified: projects/armv6/sys/arm/mv/mpic.c ============================================================================== --- projects/armv6/sys/arm/mv/mpic.c Tue Jan 31 15:45:10 2012 (r230818) +++ projects/armv6/sys/arm/mv/mpic.c Tue Jan 31 15:46:29 2012 (r230819) @@ -271,14 +271,13 @@ pic_ipi_send(cpuset_t cpus, u_int ipi) { uint32_t val, i; - val = 0x01000000; + val = 0x00000000; for (i = 0; i < MAXCPU; i++) - if (!CPU_ISSET(i, &cpus)) + if (CPU_ISSET(i, &cpus)) val |= (1 << (8 + i)); - val |= ipi | 0xf00; + val |= ipi; bus_space_write_4(mv_mpic_sc->mpic_bst, mv_mpic_sc->mpic_bsh, MPIC_SOFT_INT, val); - } int
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