Date: Wed, 16 Aug 2000 11:38:19 -0400 (EDT) From: Garrett Rooney <rooneg@rpi.edu> To: freebsd-mobile@freebsd.org Subject: Re: Sound card setup: ESS Maestro-2E on fujitsu lifebook e-seris Message-ID: <Pine.A41.3.96.1000816113517.112104B-300000@cortez.sss.rpi.edu> In-Reply-To: <20000816060928.8623A483B@hcswork.hcs.de>
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[-- Attachment #1 --] > >From the keyboard of Garrett Rooney: > > > after applying the mstr2_gpio and mstr2_spk patches > > Where did you got them from ? since several people have emailed me asking for these, and i can't find them in the archives, here they are. note that i don't have the card currently working, and i haven't had time to play around any more, so i can't vouch for the usefulness of these patches. also, they have windows style line breaks, which i had to fix before patch would apply them properly. i don't currently have access to the fixed versions. -garrett x----------------------------------------------------------------------x | rooneg@rpi.edu garrett rooney | | http://www.rpi.edu/~rooneg unix geek | |----------------------------------------------------------------------| | unrequited love is neat because it lasts so much longer - w. t. c. | x----------------------------------------------------------------------x [-- Attachment #2 --] --- maestro.c.org1 Fri Aug 11 14:13:28 2000 +++ maestro.c Fri Aug 11 14:18:42 2000 @@ -834,6 +834,16 @@ goto bad; } +#define DEBUG_GPIO +#ifdef DEBUG_GPIO + printf("GIPO_MASK: %04x\n", + bus_space_read_2(ess->st, ess->sh, PORT_GPIO_MASK)); + printf("GIPO_DIR : %04x\n", + bus_space_read_2(ess->st, ess->sh, PORT_GPIO_DIR)); + printf("GIPO_DATA: %04x\n", + bus_space_read_2(ess->st, ess->sh, PORT_GPIO_DATA)); +#endif + ess->subid = pci_read_config(dev, PCIR_SUBVEND_0, 4); /* Needed for Dell Inspiron 7500? */ [-- Attachment #3 --] --- maestro.c.org Tue Jul 25 03:20:26 2000 +++ maestro.c Fri Aug 11 14:11:33 2000 @@ -50,6 +50,9 @@ #define MAESTRO_2_PCI_ID 0x1968125d #define MAESTRO_2E_PCI_ID 0x1978125d +#define NEC_SUBID1 0x80581033 /* Taken from Linux driver */ +#define NEC_SUBID2 0x803c1033 /* NEC VersaProNX VA26D */ + #define AGG_MAXPLAYCH 4 #define AGG_BUFSIZ (8 << 10) @@ -87,6 +90,8 @@ unsigned playchns, active; struct agg_chinfo pch[AGG_MAXPLAYCH]; struct agg_chinfo rch; + + u_int32_t subid; }; @@ -95,8 +100,8 @@ static void set_timer(struct agg_info*); -static u_int32_t agg_rdcodec(struct agg_info*, int); -static void agg_wrcodec(struct agg_info*, int, u_int32_t); +static u_int32_t agg_rdcodec(void *, int); +static void agg_wrcodec(void *, int, u_int32_t); static inline void ringbus_setdest(struct agg_info*, int, int); @@ -117,9 +122,9 @@ static void agg_init(struct agg_info*); static void agg_deinit(struct agg_info*); -static u_int32_t agg_ac97_init(struct agg_info*); +static u_int32_t agg_ac97_init(void *); -static void agg_intr(struct agg_info*); +static void agg_intr(void *); static pcmchan_init_t aggch_init; static pcmchan_setdir_t aggch_setdir; static pcmchan_setformat_t aggch_setplayformat; @@ -143,8 +148,9 @@ /* Codec/Ringbus */ static u_int32_t -agg_rdcodec(struct agg_info *ess, int regno) +agg_rdcodec(void *s, int regno) { + struct agg_info *ess = (struct agg_info *)s; unsigned t; /* We have to wait for a SAFE time to write addr/data */ @@ -178,8 +184,9 @@ } static void -agg_wrcodec(struct agg_info *ess, int regno, u_int32_t data) +agg_wrcodec(void *s, int regno, u_int32_t data) { + struct agg_info *ess = (struct agg_info *)s; unsigned t; /* We have to wait for a SAFE time to write addr/data */ @@ -351,6 +358,37 @@ | WAVCACHE_WAVETABLE_SIZE_2MB); wp_wrreg(ess, WPREG_BASE, 0x8500); wp_wrreg(ess, WPREG_TIMER_ENABLE, 1); + + /* Setup ASSP. Needed for Dell Inspiron 7500? */ + bus_space_write_1(ess->st, ess->sh, PORT_ASSP_CNTL_B, 0x00); + bus_space_write_1(ess->st, ess->sh, PORT_ASSP_CNTL_A, 0x03); + bus_space_write_1(ess->st, ess->sh, PORT_ASSP_CNTL_C, 0x00); + + /* + * Setup GPIO. + * There seems to be speciality with NEC systems. + */ + switch (ess->subid) { + case NEC_SUBID1: + bus_space_write_2(ess->st, ess->sh, PORT_GPIO_MASK, 0x09ff); + bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DIR, + bus_space_read_2(ess->st, ess->sh, PORT_GPIO_DIR)| 0x600); + bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DATA, 0x0209); + break; + case NEC_SUBID2: + /* For VersaProNX VA26D */ + bus_space_write_2(ess->st, ess->sh, PORT_GPIO_MASK, 0x09e4); + bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DIR, 0x061b); + bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DATA, 0x03ef); + break; + default: + bus_space_write_2(ess->st, ess->sh, PORT_GPIO_MASK, + bus_space_read_2(ess->st, ess->sh, PORT_GPIO_MASK) & 0xfffe); + bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DIR, + bus_space_read_2(ess->st, ess->sh, PORT_GPIO_DIR) | 0x11); + bus_space_write_2(ess->st, ess->sh, PORT_GPIO_DATA, + bus_space_read_2(ess->st, ess->sh, PORT_GPIO_DATA) | 0x01); + } } static void @@ -371,8 +409,9 @@ } static u_int32_t -agg_ac97_init(struct agg_info *ess) +agg_ac97_init(void *s) { + struct agg_info *ess = (struct agg_info *)s; u_int32_t data; data = bus_space_read_4(ess->st, ess->sh, PORT_RINGBUS_CTRL); @@ -391,8 +430,9 @@ } static void -agg_intr(struct agg_info* ess) +agg_intr(void *s) { + struct agg_info *ess = (struct agg_info *)s; u_int16_t status; int i; @@ -745,7 +785,7 @@ struct agg_info *ess = NULL; u_int32_t data; int mapped = 0; - int regid = PCI_MAP_REG_START; + int regid = PCIR_MAPS; struct resource *reg = NULL; struct ac97_info *codec = NULL; int irqid = 0; @@ -793,6 +833,12 @@ device_printf(dev, "unable to map register space\n"); goto bad; } + + ess->subid = pci_read_config(dev, PCIR_SUBVEND_0, 4); + + /* Needed for Dell Inspiron 7500? */ + data = pci_read_config(dev, CONFIGURATION_B, 2); + pci_write_config(dev, CONFIGURATION_B, data|ENABLE_DSP_IF, 2); agg_init(ess); codec = ac97_create(dev, ess, agg_ac97_init, agg_rdcodec, agg_wrcodec); --- maestro_reg.h.org Tue Jul 25 03:11:52 2000 +++ maestro_reg.h Fri Aug 11 14:12:44 2000 @@ -43,6 +43,10 @@ #define PPMI_D2 2 /* Low power */ #define PPMI_D3 3 /* Turned off */ +/* Maestro2E Configuration B */ +#define CONFIGURATION_B 0x52 /* WORD RW */ +#define ENABLE_DSP_IF 0x0010 + /* ----------------------------- * I/O ports @@ -143,6 +147,17 @@ #define RINGBUS_DEST_RESERVED3 3 #define RINGBUS_DEST_DSOUND_IN 4 #define RINGBUS_DEST_ASSP_IN 5 + +/* GPIO control */ +#define PORT_GPIO_DATA 0x60 /* WORD RW */ +#define PORT_GPIO_MASK 0x64 /* WORD RW */ +#define PORT_GPIO_DIR 0x68 /* WORD RW */ + +/* ASSP control */ +#define PORT_ASSP_CNTL_A 0xa2 /* BYTE RW */ +#define PORT_ASSP_CNTL_B 0xa4 /* BYTE RW */ +#define PORT_ASSP_CNTL_C 0xa6 /* BYTE RW */ + /* -----------------------------home | help
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