Date: Tue, 17 Jan 2012 18:22:18 +0100 From: Marius Strobl <marius@alchemy.franken.de> To: Ed Schouten <ed@80386.nl> Cc: svn-src-head@freebsd.org, svn-src-all@freebsd.org, src-committers@freebsd.org Subject: Re: svn commit: r230025 - head/contrib/compiler-rt/lib/sparc64 Message-ID: <20120117172218.GZ44286@alchemy.franken.de> In-Reply-To: <20120117145505.GG95413@hoeg.nl> References: <201201121755.q0CHtMA2020344@svn.freebsd.org> <20120113000057.GA23960@alchemy.franken.de> <20120117145505.GG95413@hoeg.nl>
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--5/uDoXvLw7AC5HRs Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Tue, Jan 17, 2012 at 03:55:05PM +0100, Ed Schouten wrote: > Hi Marius, > > * Marius Strobl <marius@alchemy.franken.de>, 20120113 01:00: > > Uhm, these are V8-specific, for V9 the C compiler frame size should > > be 192 instead of 64 and the function alignment should be 32 instead > > of 4 bytes (at least with GCC and US1-optimizations enabled as we > > default to on sparc64), see <machine/asm.h>. However, given that > > these functions only seem to obtain new register window for > > debugging purposes you probably alternatively could just remove > > the saves and the corresponding restores completely. > > Any comments on the attached patch? > Index: divmod.m4 =================================================================== --- divmod.m4 (revision 230265) +++ divmod.m4 (working copy) @@ -235,7 +236,6 @@ got_result: tst SIGN bge 1f - restore ! answer < 0 retl ! leaf-routine return ifelse( ANSWER, `quotient', Sorry, on closer inspection you cannot just litteraly remove the restore in this case. The problem is that both bge and retl are delayed control-transfer instructions and the restore is done in the delay slot of the bge, which means it's actually execetuted before the branch (in FreeBSD source we usually mark this via an additional space character before the instruction in a delay slot so it's easier to spot). If you just remove the restore retl is now in the delay slot of bge, which gives wrong behavior. You therefore either need to replace it with a nop or you can actually take advantage of the delay slots like done in the attached patch (untested). Marius --5/uDoXvLw7AC5HRs Content-Type: text/x-diff; charset=us-ascii Content-Disposition: attachment; filename="sparc.diff" Index: divmod.m4 =================================================================== --- divmod.m4 (revision 230267) +++ divmod.m4 (working copy) @@ -59,9 +59,6 @@ define(SC,`%g2') #include "../assembly.h" -.text - .align 4 - define(DEVELOP_QUOTIENT_BITS, ` !depth $1, accumulated bits $2 bl L.$1.eval(TWOSUPN+$2) @@ -84,12 +81,14 @@ L.$1.eval(TWOSUPN+$2): ifelse( $1, 1, `9:') ') ifelse( ANSWER, `quotient', ` +.text + .align 32 DEFINE_COMPILERRT_FUNCTION(__udivsi3) - save %sp,-64,%sp ! do this for debugging b divide mov 0,SIGN ! result always nonnegative +.text + .align 32 DEFINE_COMPILERRT_FUNCTION(__divsi3) - save %sp,-64,%sp ! do this for debugging orcc divisor,dividend,%g0 ! are either dividend or divisor negative bge divide ! if not, skip this junk xor divisor,dividend,SIGN ! record sign of result in sign of SIGN @@ -104,12 +103,14 @@ DEFINE_COMPILERRT_FUNCTION(__divsi3) neg dividend ! FALL THROUGH ',` +.text + .align 32 DEFINE_COMPILERRT_FUNCTION(__umodsi3) - save %sp,-64,%sp ! do this for debugging b divide mov 0,SIGN ! result always nonnegative +.text + .align 32 DEFINE_COMPILERRT_FUNCTION(__modsi3) - save %sp,-64,%sp ! do this for debugging orcc divisor,dividend,%g0 ! are either dividend or divisor negative bge divide ! if not, skip this junk mov dividend,SIGN ! record sign of result in sign of SIGN @@ -184,8 +185,8 @@ do_single_div: nop sub R,V,R mov 1,Q - b end_single_divloop - nop + b,a end_single_divloop + ! EMPTY single_divloop: sll Q,1,Q bl 1f @@ -202,8 +203,8 @@ single_divloop: deccc SC bge single_divloop tst R - b end_regular_divide - nop + b,a end_regular_divide + ! EMPTY not_really_big: 1: @@ -224,9 +225,8 @@ end_regular_divide: deccc ITER bge divloop tst R - bge got_result - nop - ! non-restoring fixup here + bl,a got_result + ! non-restoring fixup if remainder < 0, otherwise annulled ifelse( ANSWER, `quotient', ` dec Q ',` add R,divisor,R @@ -234,13 +234,11 @@ ifelse( ANSWER, `quotient', got_result: tst SIGN - bge 1f - restore - ! answer < 0 - retl ! leaf-routine return + bl,a 1f + ! negate for answer < 0, otherwise annulled ifelse( ANSWER, `quotient', -` neg %o2,%o0 ! quotient <- -Q -',` neg %o3,%o0 ! remainder <- -R +` neg %o2,%o2 ! Q <- -Q +',` neg %o3,%o3 ! R <- -R ') 1: retl ! leaf-routine return --5/uDoXvLw7AC5HRs--
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