Date: Fri, 4 Sep 2015 15:40:20 +0000 (UTC) From: Sean Bruno <sbruno@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-10@freebsd.org Subject: svn commit: r287462 - in stable/10/sys/x86: include x86 Message-ID: <201509041540.t84FeKIH016212@repo.freebsd.org>
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Author: sbruno Date: Fri Sep 4 15:40:19 2015 New Revision: 287462 URL: https://svnweb.freebsd.org/changeset/base/287462 Log: MFC r276834 Update Features2 to display SDBG capability of processor. This is showing up on Haswell-class CPUs From the Intel SDM, "Table 3-20. Feature Information Returned in the ECX Register" 11 | SDBG | A value of 1 indicates the processor supports IA32_DEBUG_INTERFACE MSR for silicon debug. Submitted by: jiashiun@gmail.com Modified: stable/10/sys/x86/include/specialreg.h stable/10/sys/x86/x86/identcpu.c Directory Properties: stable/10/ (props changed) Modified: stable/10/sys/x86/include/specialreg.h ============================================================================== --- stable/10/sys/x86/include/specialreg.h Fri Sep 4 15:34:27 2015 (r287461) +++ stable/10/sys/x86/include/specialreg.h Fri Sep 4 15:40:19 2015 (r287462) @@ -157,6 +157,7 @@ #define CPUID2_TM2 0x00000100 #define CPUID2_SSSE3 0x00000200 #define CPUID2_CNXTID 0x00000400 +#define CPUID2_SDBG 0x00000800 #define CPUID2_FMA 0x00001000 #define CPUID2_CX16 0x00002000 #define CPUID2_XTPR 0x00004000 Modified: stable/10/sys/x86/x86/identcpu.c ============================================================================== --- stable/10/sys/x86/x86/identcpu.c Fri Sep 4 15:34:27 2015 (r287461) +++ stable/10/sys/x86/x86/identcpu.c Fri Sep 4 15:40:19 2015 (r287462) @@ -781,7 +781,7 @@ printcpuinfo(void) "\011TM2" /* Thermal Monitor 2 */ "\012SSSE3" /* SSSE3 */ "\013CNXT-ID" /* L1 context ID available */ - "\014<b11>" + "\014SDBG" /* IA32 silicon debug */ "\015FMA" /* Fused Multiply Add */ "\016CX16" /* CMPXCHG16B Instruction */ "\017xTPR" /* Send Task Priority Messages*/
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