Date: Wed, 11 Oct 2017 14:59:04 +0000 (UTC) From: Conrad Meyer <cem@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r324533 - head/sys/dev/hwpmc Message-ID: <201710111459.v9BEx492028775@repo.freebsd.org>
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Author: cem Date: Wed Oct 11 14:59:04 2017 New Revision: 324533 URL: https://svnweb.freebsd.org/changeset/base/324533 Log: hwpmc(4): Force sufficiently wide type for left shift Ordinary input to this macro comes from pe_code, which is uint16_t. Coverity points out that shifting such a value discards the result of a 24 bit shift, which is not what we want. A follow-up to r324291. CID: 1381676 Sponsored by: Dell EMC Isilon Modified: head/sys/dev/hwpmc/hwpmc_amd.h Modified: head/sys/dev/hwpmc/hwpmc_amd.h ============================================================================== --- head/sys/dev/hwpmc/hwpmc_amd.h Wed Oct 11 14:41:11 2017 (r324532) +++ head/sys/dev/hwpmc/hwpmc_amd.h Wed Oct 11 14:59:04 2017 (r324533) @@ -67,7 +67,7 @@ #define AMD_PMC_EVENTMASK 0xF000000FF #define AMD_PMC_TO_UNITMASK(x) (((x) << 8) & AMD_PMC_UNITMASK) -#define AMD_PMC_TO_EVENTMASK(x) (((x) & 0xFF) | (((x) & 0xF00) << 24)) +#define AMD_PMC_TO_EVENTMASK(x) (((x) & 0xFF) | (((uint32_t)(x) & 0xF00) << 24)) #define AMD_VALID_BITS (AMD_PMC_COUNTERMASK | AMD_PMC_INVERT | \ AMD_PMC_ENABLE | AMD_PMC_INT | AMD_PMC_PC | AMD_PMC_EDGE | \ AMD_PMC_OS | AMD_PMC_USR | AMD_PMC_UNITMASK | AMD_PMC_EVENTMASK)
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