Date: Mon, 18 Oct 2021 14:08:15 GMT From: Mark Johnston <markj@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Subject: git: 06ebadc5f555 - main - x86: Remove some leftover APM support Message-ID: <202110181408.19IE8F9q066502@gitrepo.freebsd.org>
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The branch main has been updated by markj: URL: https://cgit.FreeBSD.org/src/commit/?id=06ebadc5f555fd7fa6f869af1e5daf834b1bb04e commit 06ebadc5f555fd7fa6f869af1e5daf834b1bb04e Author: Mark Johnston <markj@FreeBSD.org> AuthorDate: 2021-10-16 13:46:43 +0000 Commit: Mark Johnston <markj@FreeBSD.org> CommitDate: 2021-10-18 13:56:59 +0000 x86: Remove some leftover APM support This is obsolete since commit 8c576a279ed5 ("Remove APM BIOS support"). Reviewed by: imp, kib MFC after: 1 week Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D32510 --- sys/x86/x86/tsc.c | 19 ------------------- 1 file changed, 19 deletions(-) diff --git a/sys/x86/x86/tsc.c b/sys/x86/x86/tsc.c index 15e6037c68ee..a6c7ec7a8307 100644 --- a/sys/x86/x86/tsc.c +++ b/sys/x86/x86/tsc.c @@ -42,7 +42,6 @@ __FBSDID("$FreeBSD$"); #include <sys/time.h> #include <sys/timetc.h> #include <sys/kernel.h> -#include <sys/power.h> #include <sys/smp.h> #include <sys/vdso.h> #include <machine/clock.h> @@ -585,23 +584,6 @@ init_TSC_tc(void) */ max_freq = UINT_MAX; - /* - * We can not use the TSC if we support APM. Precise timekeeping - * on an APM'ed machine is at best a fools pursuit, since - * any and all of the time spent in various SMM code can't - * be reliably accounted for. Reading the RTC is your only - * source of reliable time info. The i8254 loses too, of course, - * but we need to have some kind of time... - * We don't know at this point whether APM is going to be used - * or not, nor when it might be activated. Play it safe. - */ - if (power_pm_get_type() == POWER_PM_TYPE_APM) { - tsc_timecounter.tc_quality = -1000; - if (bootverbose) - printf("TSC timecounter disabled: APM enabled.\n"); - goto init; - } - /* * Intel CPUs without a C-state invariant TSC can stop the TSC * in either C2 or C3. Disable use of C2 and C3 while using @@ -637,7 +619,6 @@ init_TSC_tc(void) tsc_timecounter.tc_quality = 1000; max_freq >>= tsc_shift; -init: for (shift = 0; shift <= 31 && (tsc_freq >> shift) > max_freq; shift++) ;
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