Skip site navigation (1)Skip section navigation (2)
Date:      Wed, 3 Jul 2019 19:01:41 +0000 (UTC)
From:      Justin Hibbits <jhibbits@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-12@freebsd.org
Subject:   svn commit: r349673 - in stable/12/sys/powerpc: include powerpc
Message-ID:  <201907031901.x63J1fgP049017@repo.freebsd.org>

next in thread | raw e-mail | index | archive | help
Author: jhibbits
Date: Wed Jul  3 19:01:41 2019
New Revision: 349673
URL: https://svnweb.freebsd.org/changeset/base/349673

Log:
  MFC r345829,345831,349402
  
  r345829: powerpc: Apply r178139 from sparc64 to powerpc's fpu_sqrt
  r345831: powerpc: Allow emulating optional FPU instructions on CPUs with an FPU
  r349402: powerpc/booke: Handle misaligned floating point loads/stores as on AIM

Modified:
  stable/12/sys/powerpc/include/trap.h
  stable/12/sys/powerpc/powerpc/trap.c
Directory Properties:
  stable/12/   (props changed)

Modified: stable/12/sys/powerpc/include/trap.h
==============================================================================
--- stable/12/sys/powerpc/include/trap.h	Wed Jul  3 18:53:04 2019	(r349672)
+++ stable/12/sys/powerpc/include/trap.h	Wed Jul  3 19:01:41 2019	(r349673)
@@ -127,7 +127,7 @@
 /* Macros to extract register information */
 #define EXC_ALI_RST(dsisr) ((dsisr >> 5) & 0x1f)   /* source or target */
 #define EXC_ALI_RA(dsisr) (dsisr & 0x1f)
-#define	EXC_ALI_SPE_REG(instr)	((instr >> 21) & 0x1f)
+#define	EXC_ALI_INST_RST(instr)	((instr >> 21) & 0x1f)
 
 /*
  * SRR1 bits for program exception traps. These identify what caused

Modified: stable/12/sys/powerpc/powerpc/trap.c
==============================================================================
--- stable/12/sys/powerpc/powerpc/trap.c	Wed Jul  3 18:53:04 2019	(r349672)
+++ stable/12/sys/powerpc/powerpc/trap.c	Wed Jul  3 19:01:41 2019	(r349673)
@@ -832,7 +832,7 @@ static int
 fix_unaligned(struct thread *td, struct trapframe *frame)
 {
 	struct thread	*fputhread;
-#ifdef	__SPE__
+#ifdef BOOKE
 	uint32_t	inst;
 #endif
 	int		indicator, reg;
@@ -843,7 +843,7 @@ fix_unaligned(struct thread *td, struct trapframe *fra
 	if (indicator & ESR_SPE) {
 		if (copyin((void *)frame->srr0, &inst, sizeof(inst)) != 0)
 			return (-1);
-		reg = EXC_ALI_SPE_REG(inst);
+		reg = EXC_ALI_INST_RST(inst);
 		fpr = (double *)td->td_pcb->pcb_vec.vr[reg];
 		fputhread = PCPU_GET(vecthread);
 
@@ -873,12 +873,22 @@ fix_unaligned(struct thread *td, struct trapframe *fra
 		return (0);
 	}
 #else
+#ifdef BOOKE
+	indicator = (frame->cpu.booke.esr & ESR_ST) ? EXC_ALI_STFD : EXC_ALI_LFD;
+#else
 	indicator = EXC_ALI_OPCODE_INDICATOR(frame->cpu.aim.dsisr);
+#endif
 
 	switch (indicator) {
 	case EXC_ALI_LFD:
 	case EXC_ALI_STFD:
+#ifdef BOOKE
+		if (copyin((void *)frame->srr0, &inst, sizeof(inst)) != 0)
+			return (-1);
+		reg = EXC_ALI_INST_RST(inst);
+#else
 		reg = EXC_ALI_RST(frame->cpu.aim.dsisr);
+#endif
 		fpr = &td->td_pcb->pcb_fpu.fpr[reg].fpr;
 		fputhread = PCPU_GET(fputhread);
 



Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?201907031901.x63J1fgP049017>