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Date:      Fri, 13 Sep 2019 15:56:33 +0000 (UTC)
From:      Ruslan Bukin <br@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r352301 - in head/sys: conf dev/psci
Message-ID:  <201909131556.x8DFuXsu069956@repo.freebsd.org>

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Author: br
Date: Fri Sep 13 15:56:33 2019
New Revision: 352301
URL: https://svnweb.freebsd.org/changeset/base/352301

Log:
  Add generic arm/arm64 secure-monitor SMCCC interface and switch
  PSCI code to use it.
  
  This interface will also be used by Intel Stratix 10 platform.
  
  This was not tested on arm due to lack of PSCI-enabled arm hardware
  lying around.
  
  Reviewed by:	andrew
  Sponsored by:	DARPA, AFRL
  Differential Revision:	https://reviews.freebsd.org/D21439

Added:
  head/sys/dev/psci/smccc_arm.S   (contents, props changed)
  head/sys/dev/psci/smccc_arm64.S   (contents, props changed)
Deleted:
  head/sys/dev/psci/psci_arm.S
  head/sys/dev/psci/psci_arm64.S
Modified:
  head/sys/conf/files.arm
  head/sys/conf/files.arm64
  head/sys/dev/psci/psci.c
  head/sys/dev/psci/psci.h
  head/sys/dev/psci/smccc.h

Modified: head/sys/conf/files.arm
==============================================================================
--- head/sys/conf/files.arm	Fri Sep 13 15:49:04 2019	(r352300)
+++ head/sys/conf/files.arm	Fri Sep 13 15:56:33 2019	(r352301)
@@ -114,7 +114,7 @@ dev/ofw/ofwpci.c		optional	fdt pci
 dev/pci/pci_host_generic.c	optional	pci_host_generic pci
 dev/pci/pci_host_generic_fdt.c	optional	pci_host_generic pci fdt
 dev/psci/psci.c			optional	psci
-dev/psci/psci_arm.S		optional	psci
+dev/psci/smccc_arm.S		optional	psci
 dev/syscons/scgfbrndr.c		optional	sc
 dev/uart/uart_cpu_fdt.c		optional	uart fdt
 

Modified: head/sys/conf/files.arm64
==============================================================================
--- head/sys/conf/files.arm64	Fri Sep 13 15:49:04 2019	(r352300)
+++ head/sys/conf/files.arm64	Fri Sep 13 15:56:33 2019	(r352301)
@@ -233,7 +233,7 @@ dev/pci/pci_host_generic.c	optional	pci
 dev/pci/pci_host_generic_acpi.c	optional	pci acpi
 dev/pci/pci_host_generic_fdt.c	optional	pci fdt
 dev/psci/psci.c			standard
-dev/psci/psci_arm64.S		standard
+dev/psci/smccc_arm64.S		standard
 dev/psci/smccc.c		standard
 dev/sdhci/sdhci_xenon.c		optional	sdhci_xenon sdhci fdt
 dev/uart/uart_cpu_arm64.c	optional	uart

Modified: head/sys/dev/psci/psci.c
==============================================================================
--- head/sys/dev/psci/psci.c	Fri Sep 13 15:49:04 2019	(r352300)
+++ head/sys/dev/psci/psci.c	Fri Sep 13 15:56:33 2019	(r352301)
@@ -128,7 +128,9 @@ static int psci_attach(device_t, psci_initfn_t, int);
 static void psci_shutdown(void *, int);
 
 static int psci_find_callfn(psci_callfn_t *);
-static int psci_def_callfn(register_t, register_t, register_t, register_t);
+static int psci_def_callfn(register_t, register_t, register_t, register_t,
+	register_t, register_t, register_t, register_t,
+	struct arm_smccc_res *res);
 
 psci_callfn_t psci_callfn = psci_def_callfn;
 
@@ -149,7 +151,10 @@ SYSINIT(psci_start, SI_SUB_CPU, SI_ORDER_FIRST, psci_i
 
 static int
 psci_def_callfn(register_t a __unused, register_t b __unused,
-    register_t c __unused, register_t d __unused)
+    register_t c __unused, register_t d __unused,
+    register_t e __unused, register_t f __unused,
+    register_t g __unused, register_t h __unused,
+    struct arm_smccc_res *res __unused)
 {
 
 	panic("No PSCI/SMCCC call function set");
@@ -186,9 +191,9 @@ psci_fdt_get_callfn(phandle_t node)
 
 	if ((OF_getprop(node, "method", method, sizeof(method))) > 0) {
 		if (strcmp(method, "hvc") == 0)
-			return (psci_hvc_despatch);
+			return (arm_smccc_hvc);
 		else if (strcmp(method, "smc") == 0)
-			return (psci_smc_despatch);
+			return (arm_smccc_smc);
 		else
 			printf("psci: PSCI conduit \"%s\" invalid\n", method);
 	} else
@@ -282,9 +287,9 @@ psci_acpi_get_callfn(int flags)
 
 	if ((flags & ACPI_FADT_PSCI_COMPLIANT) != 0) {
 		if ((flags & ACPI_FADT_PSCI_USE_HVC) != 0)
-			return (psci_hvc_despatch);
+			return (arm_smccc_hvc);
 		else
-			return (psci_smc_despatch);
+			return (arm_smccc_smc);
 	} else {
 		printf("psci: PSCI conduit not supplied in the device tree\n");
 	}

Modified: head/sys/dev/psci/psci.h
==============================================================================
--- head/sys/dev/psci/psci.h	Fri Sep 13 15:49:04 2019	(r352300)
+++ head/sys/dev/psci/psci.h	Fri Sep 13 15:56:33 2019	(r352301)
@@ -30,9 +30,12 @@
 #define	_MACHINE_PSCI_H_
 
 #include <sys/types.h>
+#include <dev/psci/smccc.h>
 
 typedef int (*psci_initfn_t)(device_t dev, int default_version);
-typedef int (*psci_callfn_t)(register_t, register_t, register_t, register_t);
+typedef int (*psci_callfn_t)(register_t, register_t, register_t, register_t,
+	register_t, register_t, register_t, register_t,
+	struct arm_smccc_res *res);
 
 extern int psci_present;
 
@@ -47,12 +50,8 @@ static inline int
 psci_call(register_t a, register_t b, register_t c, register_t d)
 {
 
-	return (psci_callfn(a, b, c, d));
+	return (psci_callfn(a, b, c, d, 0, 0, 0, 0, NULL));
 }
-/* One of these handlers will be selected during the boot */
-int	psci_hvc_despatch(register_t, register_t, register_t, register_t);
-int	psci_smc_despatch(register_t, register_t, register_t, register_t);
-
 
 /*
  * PSCI return codes.

Modified: head/sys/dev/psci/smccc.h
==============================================================================
--- head/sys/dev/psci/smccc.h	Fri Sep 13 15:49:04 2019	(r352300)
+++ head/sys/dev/psci/smccc.h	Fri Sep 13 15:56:33 2019	(r352301)
@@ -49,6 +49,21 @@
 #define	SMCCC_32BIT_CALL	0
 #define	SMCCC_64BIT_CALL	1
 
+#define	SMCCC_ARM_ARCH_CALLS		0
+#define	SMCCC_CPU_SERVICE_CALLS		1
+#define	SMCCC_SIP_SERVICE_CALLS		2
+#define	SMCCC_OEM_SERVICE_CALLS		3
+#define	SMCCC_STD_SECURE_SERVICE_CALLS	4
+#define	SMCCC_STD_HYP_SERVICE_CALLS	5
+#define	SMCCC_VENDOR_HYP_SERVICE_CALLS	6
+
+struct arm_smccc_res {
+	register_t a0;
+	register_t a1;
+	register_t a2;
+	register_t a3;
+};
+
 /*
  * Arm Architecture Calls.
  * These are documented in the document ARM DEN 0070A.
@@ -71,5 +86,9 @@ int32_t smccc_arch_features(uint32_t);
 int smccc_arch_workaround_1(void);
 int smccc_arch_workaround_2(int);
 
+int arm_smccc_smc(register_t, register_t, register_t, register_t, register_t,
+    register_t, register_t, register_t, struct arm_smccc_res *res);
+int arm_smccc_hvc(register_t, register_t, register_t, register_t, register_t,
+    register_t, register_t, register_t, struct arm_smccc_res *res);
 
 #endif /* _PSCI_SMCCC_H_ */

Added: head/sys/dev/psci/smccc_arm.S
==============================================================================
--- /dev/null	00:00:00 1970	(empty, because file is newly added)
+++ head/sys/dev/psci/smccc_arm.S	Fri Sep 13 15:56:33 2019	(r352301)
@@ -0,0 +1,74 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Ruslan Bukin <br@bsdpad.com>
+ * Copyright (c) 2015 Andrew Turner
+ *
+ * This software was developed by SRI International and the University of
+ * Cambridge Computer Laboratory (Department of Computer Science and
+ * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
+ * DARPA SSITH research programme.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+.arch_extension sec	/* For smc */
+.arch_extension virt	/* For hvc */
+
+/*
+ * int arm_smccc_hvc(register_t, register_t, register_t, register_t,
+ *     register_t, register_t, register_t, register_t,
+ *     struct arm_smccc_res *res)
+ */
+ENTRY(arm_smccc_hvc)
+	mov	r12, sp
+	push	{r4-r7}
+	ldm	r12, {r4-r7}
+	hvc	#0
+	pop	{r4-r7}
+	ldr	r12, [sp, #(4 * 4)]
+	cmp     r12, #0
+	beq	1f
+	stm	r12, {r0-r3}
+1:	bx	lr
+END(arm_smccc_hvc)
+
+/*
+ * int arm_smccc_smc(register_t, register_t, register_t, register_t,
+ *     register_t, register_t, register_t, register_t,
+ *     struct arm_smccc_res *res)
+ */
+ENTRY(arm_smccc_smc)
+	mov	r12, sp
+	push	{r4-r7}
+	ldm	r12, {r4-r7}
+	smc	#0
+	pop	{r4-r7}
+	ldr	r12, [sp, #(4 * 4)]
+	cmp     r12, #0
+	beq	1f
+	stm	r12, {r0-r3}
+1:	bx	lr
+END(arm_smccc_smc)

Added: head/sys/dev/psci/smccc_arm64.S
==============================================================================
--- /dev/null	00:00:00 1970	(empty, because file is newly added)
+++ head/sys/dev/psci/smccc_arm64.S	Fri Sep 13 15:56:33 2019	(r352301)
@@ -0,0 +1,62 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Ruslan Bukin <br@bsdpad.com>
+ *
+ * This software was developed by SRI International and the University of
+ * Cambridge Computer Laboratory (Department of Computer Science and
+ * Technology) under DARPA contract HR0011-18-C-0016 ("ECATS"), as part of the
+ * DARPA SSITH research programme.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+__FBSDID("$FreeBSD$");
+
+/*
+ * int arm_smccc_hvc(register_t, register_t, register_t, register_t,
+ *     register_t, register_t, register_t, register_t,
+ *     struct arm_smccc_res *res)
+ */
+ENTRY(arm_smccc_hvc)
+	hvc	#0
+	ldr	x4, [sp]
+	cbz	x4, 1f
+	stp	x0, x1, [x4, #16 * 0]
+	stp	x2, x3, [x4, #16 * 1]
+1:	ret
+END(arm_smccc_hvc)
+
+/*
+ * int arm_smccc_smc(register_t, register_t, register_t, register_t,
+ *     register_t, register_t, register_t, register_t,
+ *     struct arm_smccc_res *res)
+ */
+ENTRY(arm_smccc_smc)
+	smc	#0
+	ldr	x4, [sp]
+	cbz	x4, 1f
+	stp	x0, x1, [x4, #16 * 0]
+	stp	x2, x3, [x4, #16 * 1]
+1:	ret
+END(arm_smccc_smc)



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