Date: Fri, 8 Sep 2023 13:54:51 GMT From: Andrew Turner <andrew@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Subject: git: aea540538991 - main - arm64: Fix the TCR_TBI0 macro to use UL Message-ID: <202309081354.388DspnT005886@gitrepo.freebsd.org>
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The branch main has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=aea540538991dd9e8cf21c6ca06e09f706bf2d18 commit aea540538991dd9e8cf21c6ca06e09f706bf2d18 Author: Andrew Turner <andrew@FreeBSD.org> AuthorDate: 2023-09-08 13:27:15 +0000 Commit: Andrew Turner <andrew@FreeBSD.org> CommitDate: 2023-09-08 13:31:25 +0000 arm64: Fix the TCR_TBI0 macro to use UL This needs to be 1UL to ensure the type is large enough for the shift. Sponsored by: Arm Ltd --- sys/arm64/include/armreg.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h index 034504727b39..3ae2f24c2a56 100644 --- a/sys/arm64/include/armreg.h +++ b/sys/arm64/include/armreg.h @@ -2127,7 +2127,7 @@ #define TCR_TBI1_SHIFT 38 #define TCR_TBI1 (1UL << TCR_TBI1_SHIFT) #define TCR_TBI0_SHIFT 37 -#define TCR_TBI0 (1U << TCR_TBI0_SHIFT) +#define TCR_TBI0 (1UL << TCR_TBI0_SHIFT) #define TCR_ASID_SHIFT 36 #define TCR_ASID_WIDTH 1 #define TCR_ASID_16 (1UL << TCR_ASID_SHIFT)
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