Date: Wed, 7 Nov 2018 01:42:00 +0000 (UTC) From: Justin Hibbits <jhibbits@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r340209 - head/sys/powerpc/include Message-ID: <201811070142.wA71g0WT029347@repo.freebsd.org>
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Author: jhibbits Date: Wed Nov 7 01:42:00 2018 New Revision: 340209 URL: https://svnweb.freebsd.org/changeset/base/340209 Log: powerpc/atomic: Loosen the memory barrier on atomic_load_acq_*() 'sync' is pretty heavy-handed, and is unnecessary for this use case. It's a full barrier, which is applicable for all storage types. However, atomic_load_acq_*() is only expected to operate on physical memory, not device memory, so lwsync is sufficient (lwsync provides access ordering on memory that is marked as Coherency Required and is not Write Through nor Cache Inhibited). On 32-bit systems, this is a nop, since powerpc_lwsync() is defined to use sync, as a workaround for a silicon bug in the Freescale e500 core. Modified: head/sys/powerpc/include/atomic.h Modified: head/sys/powerpc/include/atomic.h ============================================================================== --- head/sys/powerpc/include/atomic.h Tue Nov 6 23:41:44 2018 (r340208) +++ head/sys/powerpc/include/atomic.h Wed Nov 7 01:42:00 2018 (r340209) @@ -510,7 +510,7 @@ atomic_load_acq_##TYPE(volatile u_##TYPE *p) \ u_##TYPE v; \ \ v = *p; \ - mb(); \ + powerpc_lwsync(); \ return (v); \ } \ \
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