Date: Sun, 27 Apr 2014 23:31:43 +0000 (UTC) From: Adrian Chadd <adrian@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r265029 - head/sys/dev/ath/ath_hal/ar5416 Message-ID: <201404272331.s3RNVhp4004535@svn.freebsd.org>
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Author: adrian Date: Sun Apr 27 23:31:42 2014 New Revision: 265029 URL: http://svnweb.freebsd.org/changeset/base/265029 Log: Do a read-after-write to ensure the interrupt register update is flushed to the hardware. The QCA HAL has a comment noting that if this isn't done, modifications to AR_IMR_S2 before AR_IMR is flushed may produce spurious interrupts. Obtained from: QCA Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c ============================================================================== --- head/sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c Sun Apr 27 22:18:33 2014 (r265028) +++ head/sys/dev/ath/ath_hal/ar5416/ar5416_interrupts.c Sun Apr 27 23:31:42 2014 (r265029) @@ -337,6 +337,9 @@ ar5416SetInterrupts(struct ath_hal *ah, /* Write the new IMR and store off our SW copy. */ HALDEBUG(ah, HAL_DEBUG_INTERRUPT, "%s: new IMR 0x%x\n", __func__, mask); OS_REG_WRITE(ah, AR_IMR, mask); + /* Flush write */ + (void) OS_REG_READ(ah, AR_IMR); + mask = OS_REG_READ(ah, AR_IMR_S2) & ~(AR_IMR_S2_TIM | AR_IMR_S2_DTIM | AR_IMR_S2_DTIMSYNC |
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