Date: Wed, 28 Jun 2006 19:24:17 GMT From: Warner Losh <imp@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 100224 for review Message-ID: <200606281924.k5SJOHtj041926@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=100224 Change 100224 by imp@imp_lighthouse on 2006/06/28 19:23:33 Enable/disable endtx interrupt as needed. Reset the character timeout by setting STTTO in CR when we get a timeout. We're reading characters now! Affected files ... .. //depot/projects/arm/src/sys/arm/at91/uart_dev_at91usart.c#31 edit Differences ... ==== //depot/projects/arm/src/sys/arm/at91/uart_dev_at91usart.c#31 (text+ko) ==== @@ -394,7 +394,6 @@ /* Set the receive timeout to be 1.5 character times. */ WR4(&sc->sc_bas, USART_RTOR, 12); WR4(&sc->sc_bas, USART_CR, USART_CR_STTTO); - WR4(&sc->sc_bas, USART_IER, USART_CSR_TIMEOUT | USART_CSR_RXBUFF | USART_CSR_ENDRX); } else { @@ -432,6 +431,7 @@ WR4(&sc->sc_bas, PDC_TPR, addr); WR4(&sc->sc_bas, PDC_TCR, sc->sc_txdatasz); WR4(&sc->sc_bas, PDC_PTCR, PDC_PTCR_TXTEN); + WR4(&sc->sc_bas, USART_IER, USART_CSR_ENDTX); uart_unlock(sc->sc_hwmtx); #else for (int i = 0; i < sc->sc_txdatasz; i++) @@ -502,12 +502,17 @@ bus_dmamap_unload(atsc->dmatag, atsc->tx_map); } uart_lock(sc->sc_hwmtx); - if ((csr & USART_CSR_TXRDY) && sc->sc_txbusy) { - ipend |= SER_INT_TXIDLE; + if (csr & USART_CSR_TXRDY) { + if (sc->sc_txbusy) + ipend |= SER_INT_TXIDLE; WR4(&sc->sc_bas, USART_IDR, USART_CSR_TXRDY); } - if ((csr & USART_CSR_ENDTX) && sc->sc_txbusy) - ipend |= SER_INT_TXIDLE; + if (csr & USART_CSR_ENDTX) { + if (sc->sc_txbusy) + ipend |= SER_INT_TXIDLE; + WR4(&sc->sc_bas, USART_IDR, USART_CSR_ENDTX); + } + /* * Due to the contraints of the DMA engine present in the * atmel chip, I can't just say I have a rx interrupt pending @@ -565,6 +570,7 @@ uart_rx_put(sc, atsc->ping->buffer[i]); WR4(&sc->sc_bas, PDC_RPR, atsc->ping->pa); WR4(&sc->sc_bas, PDC_RCR, sc->sc_rxfifosz); + WR4(&sc->sc_bas, USART_CR, USART_CR_STTTO); WR4(&sc->sc_bas, PDC_PTCR, PDC_PTCR_RXTEN); ipend |= SER_INT_RXREADY; }
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