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Date:      Wed, 8 Jan 2014 19:33:16 +0000 (UTC)
From:      "Pedro F. Giffuni" <pfg@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-10@freebsd.org
Subject:   svn commit: r260455 - in stable/10/contrib/gcc: . config/arm
Message-ID:  <201401081933.s08JXG9d031470@svn.freebsd.org>

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Author: pfg
Date: Wed Jan  8 19:33:16 2014
New Revision: 260455
URL: http://svnweb.freebsd.org/changeset/base/260455

Log:
  MFC r259873:
  
  gcc: small enhancements for the arm support.
  
  fixes GCC-PR target/31152
  
  Obtained from:	gcc 4.3 (rev. r118461, 125973: GPLv2)

Modified:
  stable/10/contrib/gcc/ChangeLog.gcc43
  stable/10/contrib/gcc/config/arm/arm.c
  stable/10/contrib/gcc/config/arm/arm.md
Directory Properties:
  stable/10/   (props changed)

Modified: stable/10/contrib/gcc/ChangeLog.gcc43
==============================================================================
--- stable/10/contrib/gcc/ChangeLog.gcc43	Wed Jan  8 18:16:40 2014	(r260454)
+++ stable/10/contrib/gcc/ChangeLog.gcc43	Wed Jan  8 19:33:16 2014	(r260455)
@@ -65,6 +65,12 @@
 	fvisibility-ms-compat.
 	* c.opt (fvisibility-ms-compat): New.
 
+2007-06-23  Richard Earnshaw  <rearnsha@arm.com> (r125973)
+
+	PR target/31152
+	* arm.md (negscc): Match the correct operand for optimized LT0 test.
+	Remove optimization for GT.
+
 2007-06-05  Joerg Wunsch  <j.gnu@uriah.heep.sax.de> (r125346)
 
 	PR preprocessor/23479
@@ -594,6 +600,14 @@
 	* config/i386/i386.md (bswapsi2): New.
 	(bswapdi2): Ditto.
 
+2006-11-03  Paul Brook  <paul@codesourcery.com> (r118461)
+
+	gcc/
+	* config/arm/arm.c (arm_file_start): New function.
+	(TARGET_ASM_FILE_START): Define.
+	(arm_default_cpu): New variable.
+	(arm_override_options): Set arm_default_cpu.
+
 2006-10-31  Geoffrey Keating  <geoffk@apple.com> (r118360)
  
 	* coverage.c (coverage_checksum_string): Update comment.

Modified: stable/10/contrib/gcc/config/arm/arm.c
==============================================================================
--- stable/10/contrib/gcc/config/arm/arm.c	Wed Jan  8 18:16:40 2014	(r260454)
+++ stable/10/contrib/gcc/config/arm/arm.c	Wed Jan  8 19:33:16 2014	(r260455)
@@ -154,6 +154,7 @@ static void arm_encode_section_info (tre
 #endif
 
 static void arm_file_end (void);
+static void arm_file_start (void);
 
 #ifdef AOF_ASSEMBLER
 static void aof_globalize_label (FILE *, const char *);
@@ -202,6 +203,9 @@ static bool arm_tls_symbol_p (rtx x);
 #undef  TARGET_ATTRIBUTE_TABLE
 #define TARGET_ATTRIBUTE_TABLE arm_attribute_table
 
+#undef TARGET_ASM_FILE_START
+#define TARGET_ASM_FILE_START arm_file_start
+
 #undef TARGET_ASM_FILE_END
 #define TARGET_ASM_FILE_END arm_file_end
 
@@ -390,6 +394,9 @@ rtx arm_compare_op0, arm_compare_op1;
 /* The processor for which instructions should be scheduled.  */
 enum processor_type arm_tune = arm_none;
 
+/* The default processor used if not overriden by commandline.  */
+static enum processor_type arm_default_cpu = arm_none;
+
 /* Which floating point model to use.  */
 enum arm_fp_model arm_fp_model;
 
@@ -1020,8 +1027,9 @@ arm_override_options (void)
 	  insn_flags = sel->flags;
 	}
       sprintf (arm_arch_name, "__ARM_ARCH_%s__", sel->arch);
+      arm_default_cpu = (enum processor_type) (sel - all_cores);
       if (arm_tune == arm_none)
-	arm_tune = (enum processor_type) (sel - all_cores);
+	arm_tune = arm_default_cpu;
     }
 
   /* The processor for which we should tune should now have been
@@ -14458,6 +14466,105 @@ arm_asm_output_labelref (FILE *stream, c
 }
 
 static void
+arm_file_start (void)
+{
+  int val;
+
+  if (TARGET_BPABI)
+    {
+      const char *fpu_name;
+      if (arm_select[0].string)
+	asm_fprintf (asm_out_file, "\t.cpu %s\n", arm_select[0].string);
+      else if (arm_select[1].string)
+	asm_fprintf (asm_out_file, "\t.arch %s\n", arm_select[1].string);
+      else
+	asm_fprintf (asm_out_file, "\t.cpu %s\n",
+		     all_cores[arm_default_cpu].name);
+
+      if (TARGET_SOFT_FLOAT)
+	{
+	  if (TARGET_VFP)
+	    fpu_name = "softvfp";
+	  else
+	    fpu_name = "softfpa";
+	}
+      else
+	{
+	  switch (arm_fpu_arch)
+	    {
+	    case FPUTYPE_FPA:
+	      fpu_name = "fpa";
+	      break;
+	    case FPUTYPE_FPA_EMU2:
+	      fpu_name = "fpe2";
+	      break;
+	    case FPUTYPE_FPA_EMU3:
+	      fpu_name = "fpe3";
+	      break;
+	    case FPUTYPE_MAVERICK:
+	      fpu_name = "maverick";
+	      break;
+	    case FPUTYPE_VFP:
+	      if (TARGET_HARD_FLOAT)
+		asm_fprintf (asm_out_file, "\t.eabi_attribute 27, 3\n");
+	      if (TARGET_HARD_FLOAT_ABI)
+		asm_fprintf (asm_out_file, "\t.eabi_attribute 28, 1\n");
+	      fpu_name = "vfp";
+	      break;
+	    default:
+	      abort();
+	    }
+	}
+      asm_fprintf (asm_out_file, "\t.fpu %s\n", fpu_name);
+
+      /* Some of these attributes only apply when the corresponding features
+         are used.  However we don't have any easy way of figuring this out.
+	 Conservatively record the setting that would have been used.  */
+
+      /* Tag_ABI_PCS_wchar_t.  */
+      asm_fprintf (asm_out_file, "\t.eabi_attribute 18, %d\n",
+		   (int)WCHAR_TYPE_SIZE / BITS_PER_UNIT);
+
+      /* Tag_ABI_FP_rounding.  */
+      if (flag_rounding_math)
+	asm_fprintf (asm_out_file, "\t.eabi_attribute 19, 1\n");
+      if (!flag_unsafe_math_optimizations)
+	{
+	  /* Tag_ABI_FP_denomal.  */
+	  asm_fprintf (asm_out_file, "\t.eabi_attribute 20, 1\n");
+	  /* Tag_ABI_FP_exceptions.  */
+	  asm_fprintf (asm_out_file, "\t.eabi_attribute 21, 1\n");
+	}
+      /* Tag_ABI_FP_user_exceptions.  */
+      if (flag_signaling_nans)
+	asm_fprintf (asm_out_file, "\t.eabi_attribute 22, 1\n");
+      /* Tag_ABI_FP_number_model.  */
+      asm_fprintf (asm_out_file, "\t.eabi_attribute 23, %d\n", 
+		   flag_finite_math_only ? 1 : 3);
+
+      /* Tag_ABI_align8_needed.  */
+      asm_fprintf (asm_out_file, "\t.eabi_attribute 24, 1\n");
+      /* Tag_ABI_align8_preserved.  */
+      asm_fprintf (asm_out_file, "\t.eabi_attribute 25, 1\n");
+      /* Tag_ABI_enum_size.  */
+      asm_fprintf (asm_out_file, "\t.eabi_attribute 26, %d\n",
+		   flag_short_enums ? 1 : 2);
+
+      /* Tag_ABI_optimization_goals.  */
+      if (optimize_size)
+	val = 4;
+      else if (optimize >= 2)
+	val = 2;
+      else if (optimize)
+	val = 1;
+      else
+	val = 6;
+      asm_fprintf (asm_out_file, "\t.eabi_attribute 30, %d\n", val);
+    }
+  default_file_start();
+}
+
+static void
 arm_file_end (void)
 {
   int regno;

Modified: stable/10/contrib/gcc/config/arm/arm.md
==============================================================================
--- stable/10/contrib/gcc/config/arm/arm.md	Wed Jan  8 18:16:40 2014	(r260454)
+++ stable/10/contrib/gcc/config/arm/arm.md	Wed Jan  8 19:33:16 2014	(r260455)
@@ -8841,15 +8841,12 @@
    (clobber (reg:CC CC_REGNUM))]
   "TARGET_ARM"
   "*
-  if (GET_CODE (operands[3]) == LT && operands[3] == const0_rtx)
+  if (GET_CODE (operands[3]) == LT && operands[2] == const0_rtx)
     return \"mov\\t%0, %1, asr #31\";
 
   if (GET_CODE (operands[3]) == NE)
     return \"subs\\t%0, %1, %2\;mvnne\\t%0, #0\";
 
-  if (GET_CODE (operands[3]) == GT)
-    return \"subs\\t%0, %1, %2\;mvnne\\t%0, %0, asr #31\";
-
   output_asm_insn (\"cmp\\t%1, %2\", operands);
   output_asm_insn (\"mov%D3\\t%0, #0\", operands);
   return \"mvn%d3\\t%0, #0\";



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