Date: Thu, 2 Jan 2003 12:14:37 -0800 From: Marcel Moolenaar <marcel@xcllnt.net> To: John Baldwin <jhb@freebsd.org> Cc: Perforce Change Reviews <perforce@freebsd.org> Subject: Re: PERFORCE change 23029 for review Message-ID: <20030102201437.GB616@dhcp01.pn.xcllnt.net> In-Reply-To: <XFMail.20030102105930.jhb@FreeBSD.org> References: <200301012203.h01M3nKH028011@repoman.freebsd.org> <XFMail.20030102105930.jhb@FreeBSD.org>
next in thread | previous in thread | raw e-mail | index | archive | help
On Thu, Jan 02, 2003 at 10:59:30AM -0500, John Baldwin wrote: > > On 01-Jan-2003 Marcel Moolenaar wrote: > > http://perforce.freebsd.org/chv.cgi?CH=23029 > > > > Change 23029 by marcel@marcel_nfs on 2003/01/01 14:03:34 > > > > While here, reload cr.itm (interval timer match register) > > based on the old value of cr.itm and not cr.itc (interval > > timer counter). The value of cr.itc is non-deterministicly > > close to the value of cr.itm at the time of the interrupt. > > The SDM clearly states that they are not guaranteed to be > > identical, even though the interrupt is triggered when > > cr.itc equals cr.itm). Reloading cr.itm based on the value > > of cr.itc will therefore introduce a non-deterministic error > > in the clocks. This will also reduce clock skew due to > > interrupt latency. > > Cool. Peter says the Linux code does something similar but goes > to extra efforts to handle the case of missing entire ticks and > what not.w Yeah, that hit me after committing and I noticed that sparc64 does that too. As you have probably seen, I reverted the change for now. A missed clock interrupt is worse than a slight error. Doug got me a bit confused though, so I won't touch the code until I deconfused myself :-) -- Marcel Moolenaar USPA: A-39004 marcel@xcllnt.net To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe p4-projects" in the body of the message
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?20030102201437.GB616>