Date: Wed, 07 Jan 2026 02:27:42 +0000 From: Adrian Chadd <adrian@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Cc: Brad Smith <brad@comstyle.com> Subject: git: 5d73fca1f4b2 - main - if_rge: sync with up to date OpenBSD code Message-ID: <695dc49e.bce3.2bfd309f@gitrepo.freebsd.org>
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The branch main has been updated by adrian: URL: https://cgit.FreeBSD.org/src/commit/?id=5d73fca1f4b2bac8833e2b9233fa496059dab745 commit 5d73fca1f4b2bac8833e2b9233fa496059dab745 Author: Brad Smith <brad@comstyle.com> AuthorDate: 2026-01-07 02:24:12 +0000 Commit: Adrian Chadd <adrian@FreeBSD.org> CommitDate: 2026-01-07 02:27:09 +0000 if_rge: sync with up to date OpenBSD code a0b4d9e5bd63984bc3ad25b7f2881741e0d73980 Add support for RTL8126 chip revision 0x64a00000 from Carl Henriksson. While here, update and add microcode for the RTL8126 chipset variant. 46810ff569a9416642fc5f8e86501028008a2e95 For RTL8125, there's no need to check whether RGE_CMD_STOPREQ has been completed. As with other chip variants, RGE_CMD_STOPREQ never acknowledges completion. 5729fb17b5eeba56781da0b5c0525c198c5c2cd8 remove duplicate RGE_PHYSTAT_5000MBPS test Reviewed by: adrian Differential Revision: https://reviews.freebsd.org/D54517 Obtained from: OpenBSD --- sys/dev/rge/if_rge.c | 31 +- sys/dev/rge/if_rge_hw.c | 297 +- sys/dev/rge/if_rge_microcode.h | 10791 +++++++++++++-------------------------- sys/dev/rge/if_rgereg.h | 6 +- sys/dev/rge/if_rgevar.h | 3 +- 5 files changed, 3779 insertions(+), 7349 deletions(-) diff --git a/sys/dev/rge/if_rge.c b/sys/dev/rge/if_rge.c index 41a39f5bfb60..fde8e9df31fe 100644 --- a/sys/dev/rge/if_rge.c +++ b/sys/dev/rge/if_rge.c @@ -415,8 +415,12 @@ rge_attach(device_t dev) // device_printf(dev, "RTL8125B\n"); break; case 0x64900000: - sc->rge_type = MAC_R26; -// device_printf(dev, "RTL8126\n"); + sc->rge_type = MAC_R26_1; +// device_printf(dev, "RTL8126_1\n"); + break; + case 0x64a00000: + sc->rge_type = MAC_R26_2; +// device_printf(dev, "RTL8126_2\n"); break; case 0x68800000: sc->rge_type = MAC_R25D; @@ -1165,7 +1169,7 @@ rge_init_locked(struct rge_softc *sc) val = rge_read_csi(sc, 0x70c) & ~0x3f000000; rge_write_csi(sc, 0x70c, val | 0x27000000); - if (sc->rge_type == MAC_R26 || sc->rge_type == MAC_R27) { + if (RGE_TYPE_R26(sc) || sc->rge_type == MAC_R27) { /* Disable L1 timeout. */ val = rge_read_csi(sc, 0x890) & ~0x00000001; rge_write_csi(sc, 0x890, val); @@ -1184,7 +1188,7 @@ rge_init_locked(struct rge_softc *sc) RGE_MAC_SETBIT(sc, 0xeb58, 0x0001); - if (sc->rge_type == MAC_R26 || sc->rge_type == MAC_R27) { + if (RGE_TYPE_R26(sc) || sc->rge_type == MAC_R27) { RGE_CLRBIT_1(sc, 0xd8, 0x02); if (sc->rge_type == MAC_R27) { RGE_CLRBIT_1(sc, 0x20e4, 0x04); @@ -1199,7 +1203,7 @@ rge_init_locked(struct rge_softc *sc) rge_write_mac_ocp(sc, 0xe614, val | 0x0300); else if (sc->rge_type == MAC_R25B) rge_write_mac_ocp(sc, 0xe614, val | 0x0200); - else if (sc->rge_type == MAC_R26) + else if (RGE_TYPE_R26(sc)) rge_write_mac_ocp(sc, 0xe614, val | 0x0300); else rge_write_mac_ocp(sc, 0xe614, val | 0x0f00); @@ -1252,7 +1256,7 @@ rge_init_locked(struct rge_softc *sc) RGE_MAC_CLRBIT(sc, 0xe080, 0x0002); } - if (sc->rge_type == MAC_R26 || sc->rge_type == MAC_R27) + if (RGE_TYPE_R26(sc) || sc->rge_type == MAC_R27) RGE_MAC_CLRBIT(sc, 0xea1c, 0x0304); else RGE_MAC_CLRBIT(sc, 0xea1c, 0x0004); @@ -1282,12 +1286,12 @@ rge_init_locked(struct rge_softc *sc) RGE_WRITE_4(sc, RGE_TIMERINT3, 0); num_miti = - (sc->rge_type == MAC_R25B || sc->rge_type == MAC_R26) ? 32 : 64; + (sc->rge_type == MAC_R25B || RGE_TYPE_R26(sc)) ? 32 : 64; /* Clear interrupt moderation timer. */ for (i = 0; i < num_miti; i++) RGE_WRITE_4(sc, RGE_INTMITI(i), 0); - if (sc->rge_type == MAC_R26) { + if (RGE_TYPE_R26(sc)) { RGE_CLRBIT_1(sc, RGE_INT_CFG0, RGE_INT_CFG0_TIMEOUT_BYPASS | RGE_INT_CFG0_RDU_BYPASS_8126 | RGE_INT_CFG0_MITIGATION_BYPASS); @@ -1439,7 +1443,7 @@ rge_ifmedia_upd(if_t ifp) /* Disable Gigabit Lite. */ RGE_PHY_CLRBIT(sc, 0xa428, 0x0200); RGE_PHY_CLRBIT(sc, 0xa5ea, 0x0001); - if (sc->rge_type == MAC_R26 || sc->rge_type == MAC_R27) + if (RGE_TYPE_R26(sc) || sc->rge_type == MAC_R27) RGE_PHY_CLRBIT(sc, 0xa5ea, 0x0007); val = rge_read_phy_ocp(sc, 0xa5d4); @@ -1447,7 +1451,8 @@ rge_ifmedia_upd(if_t ifp) case MAC_R27: val &= ~RGE_ADV_10000TFDX; /* fallthrough */ - case MAC_R26: + case MAC_R26_1: + case MAC_R26_2: val &= ~RGE_ADV_5000TFDX; /* fallthrough */ default: @@ -1461,7 +1466,7 @@ rge_ifmedia_upd(if_t ifp) switch (IFM_SUBTYPE(ifm->ifm_media)) { case IFM_AUTO: val |= RGE_ADV_2500TFDX; - if (sc->rge_type == MAC_R26) + if (RGE_TYPE_R26(sc)) val |= RGE_ADV_5000TFDX; else if (sc->rge_type == MAC_R27) val |= RGE_ADV_5000TFDX | RGE_ADV_10000TFDX; @@ -1543,8 +1548,6 @@ rge_ifmedia_sts(if_t ifp, struct ifmediareq *ifmr) ifmr->ifm_active |= IFM_2500_T; else if (status & RGE_PHYSTAT_5000MBPS) ifmr->ifm_active |= IFM_5000_T; - else if (status & RGE_PHYSTAT_5000MBPS) - ifmr->ifm_active |= IFM_5000_T; else if (status & RGE_PHYSTAT_10000MBPS) ifmr->ifm_active |= IFM_10G_T; } @@ -2453,7 +2456,7 @@ rge_add_media_types(struct rge_softc *sc) ifmedia_add(&sc->sc_media, IFM_ETHER | IFM_2500_T, 0, NULL); ifmedia_add(&sc->sc_media, IFM_ETHER | IFM_2500_T | IFM_FDX, 0, NULL); - if (sc->rge_type == MAC_R26) { + if (RGE_TYPE_R26(sc)) { ifmedia_add(&sc->sc_media, IFM_ETHER | IFM_5000_T, 0, NULL); ifmedia_add(&sc->sc_media, IFM_ETHER | IFM_5000_T | IFM_FDX, 0, NULL); diff --git a/sys/dev/rge/if_rge_hw.c b/sys/dev/rge/if_rge_hw.c index 17edad950f72..ccd6580b2cfc 100644 --- a/sys/dev/rge/if_rge_hw.c +++ b/sys/dev/rge/if_rge_hw.c @@ -67,13 +67,15 @@ static int rge_reset(struct rge_softc *sc); static void rge_set_phy_power(struct rge_softc *sc, int on); -static uint64_t rge_mcu_get_bin_version(uint16_t entries); +static void rge_mac_config_ext_mcu(struct rge_softc *, enum rge_mac_type); +static uint64_t rge_mcu_get_bin_version(const uint16_t *, uint16_t); static void rge_mcu_set_version(struct rge_softc *sc, uint64_t mcodever); static void rge_ephy_config_mac_r25(struct rge_softc *sc); static void rge_ephy_config_mac_r25b(struct rge_softc *sc); static void rge_ephy_config_mac_r27(struct rge_softc *sc); static void rge_phy_config_mac_r27(struct rge_softc *sc); -static void rge_phy_config_mac_r26(struct rge_softc *sc); +static void rge_phy_config_mac_r26_1(struct rge_softc *sc); +static void rge_phy_config_mac_r26_2(struct rge_softc *sc); static void rge_phy_config_mac_r25(struct rge_softc *sc); static void rge_phy_config_mac_r25b(struct rge_softc *sc); static void rge_phy_config_mac_r25d(struct rge_softc *sc); @@ -104,18 +106,7 @@ rge_reset(struct rge_softc *sc) RGE_SETBIT_1(sc, RGE_PPSW, 0x08); RGE_SETBIT_1(sc, RGE_CMD, RGE_CMD_STOPREQ); - if (sc->rge_type == MAC_R25) { - for (i = 0; i < 20; i++) { - DELAY(10); - if (!(RGE_READ_1(sc, RGE_CMD) & RGE_CMD_STOPREQ)) - break; - } - if (i == 20) { - RGE_PRINT_ERROR(sc, "failed to stop all requests\n"); - return ETIMEDOUT; - } - } else - DELAY(200); + DELAY(200); for (i = 0; i < 3000; i++) { DELAY(50); @@ -197,7 +188,6 @@ rge_set_phy_power(struct rge_softc *sc, int on) void rge_mac_config_mcu(struct rge_softc *sc, enum rge_mac_type type) { - uint64_t mcodever; uint16_t reg; int i, npages; @@ -278,19 +268,82 @@ rge_mac_config_mcu(struct rge_softc *sc, enum rge_mac_type type) rge_write_mac_ocp(sc, 0xfc26, 0x8000); rge_write_mac_ocp(sc, 0xfc28, 0x14a2); rge_write_mac_ocp(sc, 0xfc48, 0x0001); + } +} + +void +rge_mac_config_ext_mcu(struct rge_softc *sc, enum rge_mac_type type) +{ + const struct rge_mac_bps *bps; + uint64_t mcodever = 0; + int i; + + /* Read microcode version. */ + rge_switch_mcu_ram_page(sc, 2); + sc->rge_mcodever = 0; + for (i = 0; i < 8; i += 2) { + sc->rge_mcodever <<= 16; + sc->rge_mcodever |= rge_read_mac_ocp(sc, 0xf9f8 + i); + } + rge_switch_mcu_ram_page(sc, 0); + + if (type == MAC_R26_1) { + bps = &rtl8126_1_mac_bps; + mcodever = + rge_mcu_get_bin_version(rtl8126_1_mac_bps_vals, bps->count); + if (sc->rge_mcodever != mcodever) { + /* Switch to page 0. */ + rge_switch_mcu_ram_page(sc, 0); + for (i = 0; i < bps->count; i++) + rge_write_mac_ocp(sc, bps->regs[i], + bps->vals[i]); + } + rge_write_mac_ocp(sc, 0xfc26, 0x8000); + rge_write_mac_ocp(sc, 0xfc2c, 0x2360); + rge_write_mac_ocp(sc, 0xfc2E, 0x14a4); + rge_write_mac_ocp(sc, 0xfc30, 0x415e); + rge_write_mac_ocp(sc, 0xfc32, 0x41e4); + rge_write_mac_ocp(sc, 0xfc34, 0x4280); + rge_write_mac_ocp(sc, 0xfc36, 0x234a); + rge_write_mac_ocp(sc, 0xfc48, 0x00fc); + } else if (type == MAC_R26_2) { + bps = &rtl8126_2_mac_bps; + mcodever = + rge_mcu_get_bin_version(rtl8126_2_mac_bps_vals, bps->count); + if (sc->rge_mcodever != mcodever) { + /* Switch to page 0. */ + rge_switch_mcu_ram_page(sc, 0); + for (i = 0; i < 256; i++) + rge_write_mac_ocp(sc, bps->regs[i], + bps->vals[i]); + /* Switch to page 1. */ + rge_switch_mcu_ram_page(sc, 1); + for (; i < bps->count; i++) + rge_write_mac_ocp(sc, bps->regs[i], + bps->vals[i]); + } + rge_write_mac_ocp(sc, 0xfc26, 0x8000); + rge_write_mac_ocp(sc, 0xfc2c, 0x14a4); + rge_write_mac_ocp(sc, 0xfc2e, 0x4176); + rge_write_mac_ocp(sc, 0xfc30, 0x41fc); + rge_write_mac_ocp(sc, 0xfc32, 0x4298); + rge_write_mac_ocp(sc, 0xfc3a, 0x234a); + rge_write_mac_ocp(sc, 0xfc48, 0x023c); } else if (type == MAC_R27) { - mcodever = rge_mcu_get_bin_version(nitems(rtl8127_mac_bps)); + bps = &rtl8127_mac_bps; + mcodever = + rge_mcu_get_bin_version(rtl8127_mac_bps_vals, bps->count); if (sc->rge_mcodever != mcodever) { /* Switch to page 0. */ rge_switch_mcu_ram_page(sc, 0); for (i = 0; i < 256; i++) - rge_write_mac_ocp(sc, rtl8127_mac_bps[i].reg, - rtl8127_mac_bps[i].val); + rge_write_mac_ocp(sc, bps->regs[i], + bps->vals[i]); /* Switch to page 1. */ rge_switch_mcu_ram_page(sc, 1); - for (; i < nitems(rtl8127_mac_bps); i++) - rge_write_mac_ocp(sc, rtl8127_mac_bps[i].reg, - rtl8127_mac_bps[i].val); + for (; i < bps->count; i++) + rge_write_mac_ocp(sc, bps->regs[i], + bps->vals[i]); } rge_write_mac_ocp(sc, 0xfc26, 0x8000); rge_write_mac_ocp(sc, 0xfc28, 0x1520); @@ -302,21 +355,21 @@ rge_mac_config_mcu(struct rge_softc *sc, enum rge_mac_type type) rge_write_mac_ocp(sc, 0xfc34, 0x1a6a); rge_write_mac_ocp(sc, 0xfc36, 0x1a2c); rge_write_mac_ocp(sc, 0xfc48, 0x00ff); - - /* Write microcode version. */ - rge_mcu_set_version(sc, mcodever); } -} + + /* Write microcode version. */ + rge_mcu_set_version(sc, mcodever); +}; static uint64_t -rge_mcu_get_bin_version(uint16_t entries) +rge_mcu_get_bin_version(const uint16_t *mac_bps, uint16_t entries) { uint64_t binver = 0; int i; for (i = 0; i < 4; i++) { binver <<= 16; - binver |= rtl8127_mac_bps[entries - 4 + i].val; + binver |= mac_bps[entries - 4 + i]; } return binver; @@ -423,7 +476,8 @@ rge_phy_config(struct rge_softc *sc) case MAC_R27: val |= RGE_ADV_10000TFDX; /* fallthrough */ - case MAC_R26: + case MAC_R26_1: + case MAC_R26_2: val |= RGE_ADV_5000TFDX; /* fallthrough */ default: @@ -457,8 +511,11 @@ rge_phy_config(struct rge_softc *sc) case MAC_R25D: rge_phy_config_mac_r25d(sc); break; - case MAC_R26: - rge_phy_config_mac_r26(sc); + case MAC_R26_1: + rge_phy_config_mac_r26_1(sc); + break; + case MAC_R26_2: + rge_phy_config_mac_r26_2(sc); break; case MAC_R27: rge_phy_config_mac_r27(sc); @@ -479,7 +536,7 @@ rge_phy_config(struct rge_softc *sc) RGE_PHY_CLRBIT(sc, 0xa5d0, (sc->rge_type == MAC_R27) ? 0x000e : 0x0006); RGE_PHY_CLRBIT(sc, 0xa6d4, 0x0001); - if (sc->rge_type == MAC_R26 || sc->rge_type == MAC_R27) + if (RGE_TYPE_R26(sc) || sc->rge_type == MAC_R27) RGE_PHY_CLRBIT(sc, 0xa6d4, 0x0002); RGE_PHY_CLRBIT(sc, 0xa6d8, 0x0010); RGE_PHY_CLRBIT(sc, 0xa428, 0x0080); @@ -764,7 +821,7 @@ rge_phy_config_mac_r27(struct rge_softc *sc) } static void -rge_phy_config_mac_r26(struct rge_softc *sc) +rge_phy_config_mac_r26_1(struct rge_softc *sc) { uint16_t val; int i; @@ -781,7 +838,7 @@ rge_phy_config_mac_r26(struct rge_softc *sc) 0x0054, 0x0322, 0x00dd, 0x03ab, 0x03dc, 0x0027, 0x000e, 0x03e5, 0x03f9, 0x0012, 0x0001, 0x03f1 }; - rge_phy_config_mcu(sc, RGE_MAC_R26_RCODE_VER); + rge_phy_config_mcu(sc, RGE_MAC_R26_1_RCODE_VER); RGE_PHY_SETBIT(sc, 0xa442, 0x0800); rge_write_phy_ocp(sc, 0xa436, 0x80bf); @@ -1043,6 +1100,147 @@ rge_phy_config_mac_r26(struct rge_softc *sc) rge_write_phy_ocp(sc, 0xb54c, val | 0x3700); } +static void +rge_phy_config_mac_r26_2(struct rge_softc *sc) +{ + uint16_t val; + int i; + static const uint16_t mac_cfg3_b87e_value[] = + { 0x03ed, 0x03ff, 0x0009, 0x03fe, 0x000b, 0x0021, 0x03f7, + 0x03b8, 0x03e0, 0x0049, 0x0049, 0x03e0, 0x03b8, 0x03f7, + 0x0021, 0x000b, 0x03fe, 0x0009, 0x03ff, 0x03ed, 0x82a0, + 0x000e, 0x03fe, 0x03ed, 0x0006, 0x001a, 0x03f1, 0x03d8, + 0x0023, 0x0054, 0x0322, 0x00dd, 0x03ab, 0x03dc, 0x0027, + 0x000e, 0x03e5, 0x03f9, 0x0012, 0x0001, 0x03f1 }; + + rge_phy_config_mcu(sc, RGE_MAC_R26_2_RCODE_VER); + + RGE_PHY_SETBIT(sc, 0xa442, 0x0800); + rge_write_phy_ocp(sc, 0xa436, 0x8183); + val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00; + rge_write_phy_ocp(sc, 0xa438, val | 0x5900); + RGE_PHY_SETBIT(sc, 0xa654, 0x0800); + RGE_PHY_SETBIT(sc, 0xb648, 0x4000); + RGE_PHY_SETBIT(sc, 0xad2c, 0x8000); + RGE_PHY_SETBIT(sc, 0xad94, 0x0020); + RGE_PHY_SETBIT(sc, 0xada0, 0x0002); + val = rge_read_phy_ocp(sc, 0xae06) & ~0xfc00; + rge_write_phy_ocp(sc, 0xae06, val | 0x7c00); + rge_write_phy_ocp(sc, 0xb87c, 0x8647); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0xe600); + rge_write_phy_ocp(sc, 0xb87c, 0x8036); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x3000); + rge_write_phy_ocp(sc, 0xb87c, 0x8078); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x3000); + rge_write_phy_ocp(sc, 0xb87c, 0x89e9); + RGE_PHY_SETBIT(sc, 0xb87e, 0xff00); + rge_write_phy_ocp(sc, 0xb87c, 0x8ffd); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0100); + rge_write_phy_ocp(sc, 0xb87c, 0x8ffe); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0200); + rge_write_phy_ocp(sc, 0xb87c, 0x8fff); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0400); + rge_write_phy_ocp(sc, 0xa436, 0x8018); + val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00; + rge_write_phy_ocp(sc, 0xa438, val | 0x7700); + rge_write_phy_ocp(sc, 0xa436, 0x8f9c); + rge_write_phy_ocp(sc, 0xa438, 0x0005); + rge_write_phy_ocp(sc, 0xa438, 0x0000); + rge_write_phy_ocp(sc, 0xa438, 0x00ed); + rge_write_phy_ocp(sc, 0xa438, 0x0502); + rge_write_phy_ocp(sc, 0xa438, 0x0b00); + rge_write_phy_ocp(sc, 0xa438, 0xd401); + rge_write_phy_ocp(sc, 0xa436, 0x8fa8); + val = rge_read_phy_ocp(sc, 0xa438) & ~0xff00; + rge_write_phy_ocp(sc, 0xa438, val | 0x2900); + rge_write_phy_ocp(sc, 0xb87c, 0x814b); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x1100); + rge_write_phy_ocp(sc, 0xb87c, 0x814d); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x1100); + rge_write_phy_ocp(sc, 0xb87c, 0x814f); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0b00); + rge_write_phy_ocp(sc, 0xb87c, 0x8142); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0100); + rge_write_phy_ocp(sc, 0xb87c, 0x8144); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0100); + rge_write_phy_ocp(sc, 0xb87c, 0x8150); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0100); + rge_write_phy_ocp(sc, 0xb87c, 0x8118); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0700); + rge_write_phy_ocp(sc, 0xb87c, 0x811a); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0700); + rge_write_phy_ocp(sc, 0xb87c, 0x811c); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0500); + rge_write_phy_ocp(sc, 0xb87c, 0x810f); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0100); + rge_write_phy_ocp(sc, 0xb87c, 0x8111); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0100); + rge_write_phy_ocp(sc, 0xb87c, 0x811d); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0100); + RGE_PHY_SETBIT(sc, 0xad1c, 0x0100); + val = rge_read_phy_ocp(sc, 0xade8) & ~0xffc0; + rge_write_phy_ocp(sc, 0xade8, val | 0x1400); + rge_write_phy_ocp(sc, 0xb87c, 0x864b); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x9d00); + rge_write_phy_ocp(sc, 0xb87c, 0x862c); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x1200); + rge_write_phy_ocp(sc, 0xa436, 0x8566); + rge_write_phy_ocp(sc, 0xa438, 0x003f); + rge_write_phy_ocp(sc, 0xa438, 0x3f02); + rge_write_phy_ocp(sc, 0xa438, 0x023c); + rge_write_phy_ocp(sc, 0xa438, 0x3b0a); + rge_write_phy_ocp(sc, 0xa438, 0x1c00); + rge_write_phy_ocp(sc, 0xa438, 0x0000); + rge_write_phy_ocp(sc, 0xa438, 0x0000); + rge_write_phy_ocp(sc, 0xa438, 0x0000); + rge_write_phy_ocp(sc, 0xa438, 0x0000); + RGE_PHY_SETBIT(sc, 0xad9c, 0x0020); + rge_write_phy_ocp(sc, 0xb87c, 0x8122); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0c00); + rge_write_phy_ocp(sc, 0xb87c, 0x82c8); + for (i = 0; i < 20; i++) + rge_write_phy_ocp(sc, 0xb87e, mac_cfg3_b87e_value[i]); + rge_write_phy_ocp(sc, 0xb87c, 0x80ef); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x0c00); + for (; i < nitems(mac_cfg3_b87e_value); i++) + rge_write_phy_ocp(sc, 0xb87e, mac_cfg3_b87e_value[i]); + RGE_PHY_SETBIT(sc, 0xa430, 0x0003); + val = rge_read_phy_ocp(sc, 0xb54c) & ~0xffc0; + rge_write_phy_ocp(sc, 0xb54c, val | 0x3700); + RGE_PHY_SETBIT(sc, 0xb648, 0x0040); + rge_write_phy_ocp(sc, 0xb87c, 0x8082); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x5d00); + rge_write_phy_ocp(sc, 0xb87c, 0x807c); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x5000); + rge_write_phy_ocp(sc, 0xb87c, 0x809d); + val = rge_read_phy_ocp(sc, 0xb87e) & ~0xff00; + rge_write_phy_ocp(sc, 0xb87e, val | 0x5000); +} + static void rge_phy_config_mac_r25(struct rge_softc *sc) { @@ -1404,10 +1602,20 @@ rge_phy_config_mcu(struct rge_softc *sc, uint16_t rcodever) for (; i < nitems(mac_r25d_mcu); i++) rge_write_phy_ocp(sc, mac_r25d_mcu[i].reg, mac_r25d_mcu[i].val); - } else if (sc->rge_type == MAC_R26) { - for (i = 0; i < nitems(mac_r26_mcu); i++) + } else if (sc->rge_type == MAC_R26_1) { + for (i = 0; i < 6989; i++) + rge_write_phy_ocp(sc, + mac_r26_1_mcu[i].reg, mac_r26_1_mcu[i].val); + rge_patch_phy_mcu(sc, 0); + + rge_patch_phy_mcu(sc, 1); + for (; i < nitems(mac_r26_1_mcu); i++) rge_write_phy_ocp(sc, - mac_r26_mcu[i].reg, mac_r26_mcu[i].val); + mac_r26_1_mcu[i].reg, mac_r26_1_mcu[i].val); + } else if (sc->rge_type == MAC_R26_2) { + for (i = 0; i < nitems(mac_r26_2_mcu); i++) + rge_write_phy_ocp(sc, + mac_r26_2_mcu[i].reg, mac_r26_2_mcu[i].val); } else if (sc->rge_type == MAC_R27) { for (i = 0; i < 1887; i++) rge_write_phy_ocp(sc, @@ -1472,7 +1680,6 @@ static void rge_hw_init(struct rge_softc *sc) { uint16_t reg; - int i; RGE_ASSERT_LOCKED(sc); @@ -1490,16 +1697,10 @@ rge_hw_init(struct rge_softc *sc) DELAY(3000); rge_write_mac_ocp(sc, 0xfc26, 0); - /* Read microcode version. */ - rge_switch_mcu_ram_page(sc, 2); - sc->rge_mcodever = 0; - for (i = 0; i < 8; i += 2) { - sc->rge_mcodever <<= 16; - sc->rge_mcodever |= rge_read_mac_ocp(sc, 0xf9f8 + i); - } - rge_switch_mcu_ram_page(sc, 0); - - rge_mac_config_mcu(sc, sc->rge_type); + if (RGE_TYPE_R26(sc) || sc->rge_type == MAC_R27) + rge_mac_config_ext_mcu(sc, sc->rge_type); + else + rge_mac_config_mcu(sc, sc->rge_type); /* Disable PHY power saving. */ if (sc->rge_type == MAC_R25) @@ -1588,7 +1789,7 @@ rge_disable_aspm_clkreq(struct rge_softc *sc) if (unlock) RGE_SETBIT_1(sc, RGE_EECMD, RGE_EECMD_WRITECFG); - if (sc->rge_type == MAC_R26 || sc->rge_type == MAC_R27) + if (RGE_TYPE_R26(sc) || sc->rge_type == MAC_R27) RGE_CLRBIT_1(sc, RGE_INT_CFG0, 0x08); else RGE_CLRBIT_1(sc, RGE_CFG2, RGE_CFG2_CLKREQ_EN); diff --git a/sys/dev/rge/if_rge_microcode.h b/sys/dev/rge/if_rge_microcode.h index e81dc8b96a35..f2803b869e3f 100644 --- a/sys/dev/rge/if_rge_microcode.h +++ b/sys/dev/rge/if_rge_microcode.h @@ -166,114 +166,298 @@ static const struct rge_hw_regaddr_array rtl8125b_mac_bps[] = { { 0xfc30, 0x4a20 }, { 0xfc32, 0x47a0 }, { 0xfc48, 0x003f } }; -static const struct rge_hw_regaddr_array rtl8127_mac_bps[] = { - { 0xf800, 0xe010 }, { 0xf802, 0xe023 }, { 0xf804, 0xe036 }, - { 0xf806, 0xe049 }, { 0xf808, 0xe05c }, { 0xf80a, 0xe075 }, - { 0xf80c, 0xe0b1 }, { 0xf80e, 0xe117 }, { 0xf810, 0xe11b }, - { 0xf812, 0xe11d }, { 0xf814, 0xe11f }, { 0xf816, 0xe121 }, - { 0xf818, 0xe123 }, { 0xf81a, 0xe125 }, { 0xf81c, 0xe127 }, - { 0xf81e, 0xe129 }, { 0xf820, 0x7020 }, { 0xf822, 0xb405 }, - { 0xf824, 0xb404 }, { 0xf826, 0xc50f }, { 0xf828, 0x74a0 }, - { 0xf82a, 0xc50e }, { 0xf82c, 0x4025 }, { 0xf82e, 0xf005 }, - { 0xf830, 0x4850 }, { 0xf832, 0x4025 }, { 0xf834, 0xf002 }, - { 0xf836, 0xe002 }, { 0xf838, 0x4809 }, { 0xf83a, 0xb004 }, - { 0xf83c, 0xb005 }, { 0xf83e, 0xc502 }, { 0xf840, 0xbd00 }, - { 0xf842, 0x1522 }, { 0xf844, 0xd006 }, { 0xf846, 0x0004 }, - { 0xf848, 0x7760 }, { 0xf84a, 0xb405 }, { 0xf84c, 0xb404 }, - { 0xf84e, 0xc50f }, { 0xf850, 0x74a0 }, { 0xf852, 0xc50e }, - { 0xf854, 0x4025 }, { 0xf856, 0xf005 }, { 0xf858, 0x4850 }, - { 0xf85a, 0x4025 }, { 0xf85c, 0xf002 }, { 0xf85e, 0xe002 }, - { 0xf860, 0x4879 }, { 0xf862, 0xb004 }, { 0xf864, 0xb005 }, - { 0xf866, 0xc002 }, { 0xf868, 0xb800 }, { 0xf86a, 0x41e2 }, - { 0xf86c, 0xd006 }, { 0xf86e, 0x0004 }, { 0xf870, 0x7160 }, - { 0xf872, 0xb405 }, { 0xf874, 0xb404 }, { 0xf876, 0xc50f }, - { 0xf878, 0x74a0 }, { 0xf87a, 0xc50e }, { 0xf87c, 0x4025 }, - { 0xf87e, 0xf005 }, { 0xf880, 0x4850 }, { 0xf882, 0x4025 }, - { 0xf884, 0xf002 }, { 0xf886, 0xe002 }, { 0xf888, 0x4819 }, - { 0xf88a, 0xb004 }, { 0xf88c, 0xb005 }, { 0xf88e, 0xc302 }, - { 0xf890, 0xbb00 }, { 0xf892, 0x508e }, { 0xf894, 0xd006 }, - { 0xf896, 0x0004 }, { 0xf898, 0x7720 }, { 0xf89a, 0xb405 }, - { 0xf89c, 0xb404 }, { 0xf89e, 0xc50f }, { 0xf8a0, 0x74a0 }, - { 0xf8a2, 0xc50e }, { 0xf8a4, 0x4025 }, { 0xf8a6, 0xf005 }, - { 0xf8a8, 0x4850 }, { 0xf8aa, 0x4025 }, { 0xf8ac, 0xf002 }, - { 0xf8ae, 0xe002 }, { 0xf8b0, 0x4879 }, { 0xf8b2, 0xb004 }, - { 0xf8b4, 0xb005 }, { 0xf8b6, 0xc102 }, { 0xf8b8, 0xb900 }, - { 0xf8ba, 0x50f8 }, { 0xf8bc, 0xd006 }, { 0xf8be, 0x0004 }, - { 0xf8c0, 0x61a9 }, { 0xf8c2, 0xb403 }, { 0xf8c4, 0xb404 }, - { 0xf8c6, 0xc313 }, { 0xf8c8, 0x7460 }, { 0xf8ca, 0xc312 }, - { 0xf8cc, 0x4023 }, { 0xf8ce, 0xf005 }, { 0xf8d0, 0x4830 }, - { 0xf8d2, 0x4023 }, { 0xf8d4, 0xf002 }, { 0xf8d6, 0xe003 }, - { 0xf8d8, 0x4997 }, { 0xf8da, 0xf003 }, { 0xf8dc, 0xc00a }, - { 0xf8de, 0xe002 }, { 0xf8e0, 0xc009 }, { 0xf8e2, 0xb004 }, - { 0xf8e4, 0xb003 }, { 0xf8e6, 0xc102 }, { 0xf8e8, 0xb900 }, - { 0xf8ea, 0x34fc }, { 0xf8ec, 0xd006 }, { 0xf8ee, 0x0004 }, - { 0xf8f0, 0x02af }, { 0xf8f2, 0x041f }, { 0xf8f4, 0xb407 }, - { 0xf8f6, 0xb406 }, { 0xf8f8, 0xb405 }, { 0xf8fa, 0xb404 }, - { 0xf8fc, 0xb403 }, { 0xf8fe, 0xb402 }, { 0xf900, 0xb401 }, - { 0xf902, 0xb400 }, { 0xf904, 0x49d2 }, { 0xf906, 0xf116 }, - { 0xf908, 0xc62f }, { 0xf90a, 0x77c0 }, { 0xf90c, 0x49f9 }, - { 0xf90e, 0xf020 }, { 0xf910, 0x49fa }, { 0xf912, 0xf11e }, - { 0xf914, 0x49f2 }, { 0xf916, 0xf102 }, { 0xf918, 0xe01b }, - { 0xf91a, 0x48f2 }, { 0xf91c, 0x9fc0 }, { 0xf91e, 0xc625 }, - { 0xf920, 0x75c2 }, { 0xf922, 0x4852 }, { 0xf924, 0x9dc2 }, - { 0xf926, 0xc122 }, { 0xf928, 0x7020 }, { 0xf92a, 0x4801 }, - { 0xf92c, 0x4802 }, { 0xf92e, 0x9820 }, { 0xf930, 0xe00f }, - { 0xf932, 0xc61a }, { 0xf934, 0x77c0 }, { 0xf936, 0x49f2 }, - { 0xf938, 0xf10b }, { 0xf93a, 0xc618 }, { 0xf93c, 0x77c0 }, - { 0xf93e, 0x49f2 }, { 0xf940, 0xf007 }, { 0xf942, 0x48f2 }, - { 0xf944, 0x9fc0 }, { 0xf946, 0xc611 }, { 0xf948, 0x75c2 }, - { 0xf94a, 0x48d2 }, { 0xf94c, 0x9dc2 }, { 0xf94e, 0xb000 }, - { 0xf950, 0xb001 }, { 0xf952, 0xb002 }, { 0xf954, 0xb003 }, - { 0xf956, 0xb004 }, { 0xf958, 0xb005 }, { 0xf95a, 0xb006 }, - { 0xf95c, 0xb007 }, { 0xf95e, 0x9d6c }, { 0xf960, 0xc502 }, - { 0xf962, 0xbd00 }, { 0xf964, 0x0168 }, { 0xf966, 0xe024 }, - { 0xf968, 0xc010 }, { 0xf96a, 0xd410 }, { 0xf96c, 0xd460 }, - { 0xf96e, 0xb407 }, { 0xf970, 0xb406 }, { 0xf972, 0xb405 }, - { 0xf974, 0xb404 }, { 0xf976, 0xb403 }, { 0xf978, 0xb402 }, - { 0xf97a, 0xb401 }, { 0xf97c, 0xb400 }, { 0xf97e, 0xc152 }, - { 0xf980, 0x7020 }, { 0xf982, 0x4981 }, { 0xf984, 0xf043 }, - { 0xf986, 0xc050 }, { 0xf988, 0x7100 }, { 0xf98a, 0xb401 }, - { 0xf98c, 0xc14c }, { 0xf98e, 0x489e }, { 0xf990, 0x481d }, - { 0xf992, 0x9900 }, { 0xf994, 0xc24a }, { 0xf996, 0x7340 }, - { 0xf998, 0x49b7 }, { 0xf99a, 0xf135 }, { 0xf99c, 0xc144 }, - { 0xf99e, 0x9900 }, { 0xf9a0, 0xc245 }, { 0xf9a2, 0x7340 }, - { 0xf9a4, 0xc447 }, { 0xf9a6, 0x401c }, { 0xf9a8, 0xf109 }, - { 0xf9aa, 0x734c }, { 0xf9ac, 0x1301 }, { 0xf9ae, 0xf12b }, - { 0xf9b0, 0xc343 }, { 0xf9b2, 0x9b40 }, { 0xf9b4, 0xc33e }, - { 0xf9b6, 0x9b40 }, { 0xf9b8, 0xe022 }, { 0xf9ba, 0xc63a }, - { 0xf9bc, 0x77c0 }, { 0xf9be, 0x48f4 }, { 0xf9c0, 0x48f5 }, - { 0xf9c2, 0x48f9 }, { 0xf9c4, 0x48fa }, { 0xf9c6, 0x9fc0 }, - { 0xf9c8, 0xc231 }, { 0xf9ca, 0x7344 }, { 0xf9cc, 0x48b4 }, - { 0xf9ce, 0x9b44 }, { 0xf9d0, 0xc22e }, { 0xf9d2, 0x7340 }, - { 0xf9d4, 0x4830 }, { 0xf9d6, 0x48b1 }, { 0xf9d8, 0x4832 }, - { 0xf9da, 0x483c }, { 0xf9dc, 0x48bd }, { 0xf9de, 0x48be }, - { 0xf9e0, 0x48bf }, { 0xf9e2, 0x9b40 }, { 0xf9e4, 0xc223 }, - { 0xf9e6, 0xc32a }, { 0xf9e8, 0x9b48 }, { 0xf9ea, 0xc327 }, - { 0xf9ec, 0x9b46 }, { 0xf9ee, 0xc324 }, { 0xf9f0, 0x9b40 }, - { 0xf9f2, 0xc321 }, { 0xf9f4, 0x9b42 }, { 0xf9f6, 0xc31e }, - { 0xf9f8, 0x9b40 }, { 0xf9fa, 0xe005 }, { 0xf9fc, 0xc113 }, - { 0xf9fe, 0x7020 }, { 0xf800, 0x4881 }, { 0xf802, 0x9820 }, - { 0xf804, 0xb001 }, { 0xf806, 0xc010 }, { 0xf808, 0x9900 }, - { 0xf80a, 0xb000 }, { 0xf80c, 0xb001 }, { 0xf80e, 0xb002 }, - { 0xf810, 0xb003 }, { 0xf812, 0xb004 }, { 0xf814, 0xb005 }, - { 0xf816, 0xb006 }, { 0xf818, 0xb007 }, { 0xf81a, 0x2125 }, - { 0xf81c, 0xc102 }, { 0xf81e, 0xb900 }, { 0xf820, 0x1a6c }, - { 0xf822, 0xd410 }, { 0xf824, 0xc000 }, { 0xf826, 0xe86c }, - { 0xf828, 0xb600 }, { 0xf82a, 0xb800 }, { 0xf82c, 0xb40a }, - { 0xf82e, 0xe024 }, { 0xf830, 0x5a00 }, { 0xf832, 0x5a81 }, - { 0xf834, 0x0073 }, { 0xf836, 0x5a80 }, { 0xf838, 0x0042 }, - { 0xf83a, 0x0001 }, { 0xf83c, 0xc104 }, { 0xf83e, 0xc202 }, - { 0xf840, 0xba00 }, { 0xf842, 0x1a2e }, { 0xf844, 0xc896 }, - { 0xf846, 0xc302 }, { 0xf848, 0xbb00 }, { 0xf84a, 0x0000 }, - { 0xf84c, 0xc002 }, { 0xf84e, 0xb800 }, { 0xf850, 0x0000 }, - { 0xf852, 0xc002 }, { 0xf854, 0xb800 }, { 0xf856, 0x0000 }, - { 0xf858, 0xc502 }, { 0xf85a, 0xbd00 }, { 0xf85c, 0x0000 }, - { 0xf85e, 0xc102 }, { 0xf860, 0xb900 }, { 0xf862, 0x0000 }, - { 0xf864, 0xc102 }, { 0xf866, 0xb900 }, { 0xf868, 0x0000 }, - { 0xf86a, 0xc602 }, { 0xf86c, 0xbe00 }, { 0xf86e, 0x0000 }, - { 0xf870, 0xc602 }, { 0xf872, 0xbe00 }, { 0xf874, 0x0000 }, - { 0xf876, 0x6961 }, { 0xf878, 0x0019 }, { 0xf87a, 0x050c }, - { 0xf87c, 0x140c } +struct rge_mac_bps { + int count; + const uint16_t *regs; + const uint16_t *vals; +}; + +static const uint16_t rtl8126_1_mac_bps_regs[] = { + 0xf800, 0xf802, 0xf804, 0xf806, 0xf808, 0xf80a, 0xf80c, + 0xf80e, 0xf810, 0xf812, 0xf814, 0xf816, 0xf818, 0xf81a, + 0xf81c, 0xf81e, 0xf820, 0xf822, 0xf824, 0xf826, 0xf828, + 0xf82a, 0xf82c, 0xf82e, 0xf830, 0xf832, 0xf834, 0xf836, + 0xf838, 0xf83a, 0xf83c, 0xf83e, 0xf840, 0xf842, 0xf844, + 0xf846, 0xf848, 0xf84a, 0xf84c, 0xf84e, 0xf850, 0xf852, + 0xf854, 0xf856, 0xf858, 0xf85a, 0xf85c, 0xf85e, 0xf860, + 0xf862, 0xf864, 0xf866, 0xf868, 0xf86a, 0xf86c, 0xf86e, + 0xf870, 0xf872, 0xf874, 0xf876, 0xf878, 0xf87a, 0xf87c, + 0xf87e, 0xf880, 0xf882, 0xf884, 0xf886, 0xf888, 0xf88a, + 0xf88c, 0xf88e, 0xf890, 0xf892, 0xf894, 0xf896, 0xf898, + 0xf89a, 0xf89c, 0xf89e, 0xf8a0, 0xf8a2, 0xf8a4, 0xf8a6, + 0xf8a8, 0xf8aa, 0xf8ac, 0xf8ae, 0xf8b0, 0xf8b2, 0xf8b4, + 0xf8b6, 0xf8b8, 0xf8ba, 0xf8bc, 0xf8be, 0xf8c0, 0xf8c2, + 0xf8c4, 0xf8c6, 0xf8c8, 0xf8ca, 0xf8cc, 0xf8ce, 0xf8d0, + 0xf8d2, 0xf8d4, 0xf8d6, 0xf8d8, 0xf8da, 0xf8dc, 0xf8de, + 0xf8e0, 0xf8e2, 0xf8e4, 0xf8e6, 0xf8e8, 0xf8ea, 0xf8ec, + 0xf8ee, 0xf8f0, 0xf8f2, 0xf8f4, 0xf8f6, 0xf8f8, 0xf8fa, + 0xf8fc, 0xf8fe, 0xf900, 0xf902, 0xf904, 0xf906, 0xf908, + 0xf90a, 0xf90c, 0xf90e, 0xf910, 0xf912, 0xf914, 0xf916, + 0xf918, 0xf91a, 0xf91c, 0xf91e, 0xf920, 0xf922, 0xf924, + 0xf926, 0xf928, 0xf92a, 0xf92c, 0xf92e, 0xf930, 0xf932, + 0xf934, 0xf936, 0xf938, 0xf93a, 0xf93c, 0xf93e, 0xf940, + 0xf942, 0xf944, 0xf946, 0xf948, 0xf94a, 0xf94c, 0xf94e, + 0xf950, 0xf952, 0xf954, 0xf956, 0xf958, 0xf95a, 0xf95c, + 0xf95e, 0xf960, 0xf962, 0xf964, 0xf966, 0xf968, 0xf96a, + 0xf96c, 0xf96e, 0xf970, 0xf972, 0xf974, 0xf976, 0xf978, + 0xf97a, 0xf97c, 0xf97e, 0xf980, 0xf982, 0xf984, 0xf986, + 0xf988, 0xf98a, 0xf98c, 0xf98e, 0xf990, 0xf992, 0xf994, + 0xf996, 0xf998, 0xf99a, 0xf99c, 0xf99e, 0xf9a0, 0xf9a2, + 0xf9a4, 0xf9a6, 0xf9a8, 0xf9aa, 0xf9ac, 0xf9ae, 0xf9b0 +}; + +static const uint16_t rtl8126_1_mac_bps_vals[] = { + 0xe010, 0xe02c, 0xe04e, 0xe0a4, 0xe0a8, 0xe0ab, 0xe0ae, + 0xe0b1, 0xe0b5, 0xe0b7, 0xe0b9, 0xe0bb, 0xe0bd, 0xe0bf, + 0xe0c1, 0xe0c3, 0xc716, 0xc616, 0x9ee0, 0xc616, 0x65c0, + 0x1500, 0xf009, 0xc714, 0x66e0, 0x41b5, 0x8ee0, 0xc611, + 0x75c0, 0x4858, 0x9dc0, 0xc707, 0xc608, 0x9ee0, 0xc608, + 0xc502, 0xbd00, 0x0100, 0xe86c, 0xe000, 0xa000, 0xb404, + 0xb430, 0xc070, 0xe926, 0xc2fe, 0x400a, 0xf11a, 0x63a4, + 0x1a00, 0x49b0, 0xf002, 0x4820, 0x49b1, 0xf002, 0x4821, + 0x49b2, 0xf002, 0x4822, 0x49b3, 0xf002, 0x4823, 0xc411, + 0x6380, 0x48b0, 0x8b80, 0x6320, 0x41da, 0x8b20, 0x6380, + 0x4830, 0x8b80, 0xe003, 0x73a4, 0x9b20, 0xc302, 0xbb00, + 0x4a18, 0xc070, 0xe022, 0xc054, 0x7102, 0x4992, 0xf149, + 0x4893, 0x9902, 0x1b1f, 0xc74e, 0x72e0, 0x2521, 0x48a5, + 0x0b01, 0x1c4f, 0x9c00, 0x2121, 0x1d01, 0x41aa, 0x2521, + 0x9de0, 0x4856, 0x9de0, 0x1ccf, 0xe839, 0x48d6, 0x9de0, + 0x7102, 0x4996, 0xf1fe, 0x4814, 0x9902, 0x1cff, 0x0c01, + 0x1400, 0xf00c, 0x7102, 0x4996, 0xf0fb, 0x7102, 0x4990, + 0xf0fe, 0x1c1f, 0xe826, 0x7102, 0x4992, 0xf004, 0x4813, + 0x9902, 0xe01d, 0x1300, 0xf104, 0x4817, 0x9902, 0xe018, + 0x4894, 0x9902, 0x4995, 0xf00b, 0x121f, 0xf0f3, 0x131e, + 0xf003, 0x4998, 0xf0ef, 0x0201, 0x4818, 0x9902, 0xe7c9, + 0x1200, 0xf0e9, 0x4998, 0xf002, 0x1b01, 0x0a01, 0x4898, + 0x9902, 0xe7c0, 0xc00a, 0xc606, 0xbe00, 0x0c01, 0x1400, + 0xf1fe, 0xff80, 0x2362, 0xd456, 0xd404, 0xe400, 0x4166, + 0x9cf6, 0xc002, 0xb800, 0x14a6, 0x49d1, 0xc602, 0xbe00, + 0x4160, 0x49d1, 0xc602, 0xbe00, 0x41e6, 0x49d1, 0xc602, + 0xbe00, 0x4282, 0xc104, 0xc202, 0xba00, 0x234c, 0xd116, + 0xc602, 0xbe00, 0x0000, 0xc602, 0xbe00, 0x0000, 0xc602, + 0xbe00, 0x0000, 0xc602, 0xbe00, 0x0000, 0xc602, 0xbe00, + 0x0000, 0xc602, 0xbe00, 0x0000, 0xc602, 0xbe00, 0x0000, + 0xc602, 0xbe00, 0x0000, 0x6847, 0x0019, 0x041c, 0x1322 +}; + +static const struct rge_mac_bps rtl8126_1_mac_bps = { + nitems(rtl8126_1_mac_bps_regs), + rtl8126_1_mac_bps_regs, + rtl8126_1_mac_bps_vals +}; + +static const uint16_t rtl8126_2_mac_bps_regs[] = { + 0xf800, 0xf802, 0xf804, 0xf806, 0xf808, 0xf80a, 0xf80c, + 0xf80e, 0xf810, 0xf812, 0xf814, 0xf816, 0xf818, 0xf81a, + 0xf81c, 0xf81e, 0xf820, 0xf822, 0xf824, 0xf826, 0xf828, + 0xf82a, 0xf82c, 0xf82e, 0xf830, 0xf832, 0xf834, 0xf836, + 0xf838, 0xf83a, 0xf83c, 0xf83e, 0xf840, 0xf842, 0xf844, + 0xf846, 0xf848, 0xf84a, 0xf84c, 0xf84e, 0xf850, 0xf852, + 0xf854, 0xf856, 0xf858, 0xf85a, 0xf85c, 0xf85e, 0xf860, + 0xf862, 0xf864, 0xf866, 0xf868, 0xf86a, 0xf86c, 0xf86e, + 0xf870, 0xf872, 0xf874, 0xf876, 0xf878, 0xf87a, 0xf87c, + 0xf87e, 0xf880, 0xf882, 0xf884, 0xf886, 0xf888, 0xf88a, + 0xf88c, 0xf88e, 0xf890, 0xf892, 0xf894, 0xf896, 0xf898, + 0xf89a, 0xf89c, 0xf89e, 0xf8a0, 0xf8a2, 0xf8a4, 0xf8a6, + 0xf8a8, 0xf8aa, 0xf8ac, 0xf8ae, 0xf8b0, 0xf8b2, 0xf8b4, + 0xf8b6, 0xf8b8, 0xf8ba, 0xf8bc, 0xf8be, 0xf8c0, 0xf8c2, + 0xf8c4, 0xf8c6, 0xf8c8, 0xf8ca, 0xf8cc, 0xf8ce, 0xf8d0, + 0xf8d2, 0xf8d4, 0xf8d6, 0xf8d8, 0xf8da, 0xf8dc, 0xf8de, + 0xf8e0, 0xf8e2, 0xf8e4, 0xf8e6, 0xf8e8, 0xf8ea, 0xf8ec, + 0xf8ee, 0xf8f0, 0xf8f2, 0xf8f4, 0xf8f6, 0xf8f8, 0xf8fa, + 0xf8fc, 0xf8fe, 0xf900, 0xf902, 0xf904, 0xf906, 0xf908, + 0xf90a, 0xf90c, 0xf90e, 0xf910, 0xf912, 0xf914, 0xf916, + 0xf918, 0xf91a, 0xf91c, 0xf91e, 0xf920, 0xf922, 0xf924, + 0xf926, 0xf928, 0xf92a, 0xf92c, 0xf92e, 0xf930, 0xf932, + 0xf934, 0xf936, 0xf938, 0xf93a, 0xf93c, 0xf93e, 0xf940, + 0xf942, 0xf944, 0xf946, 0xf948, 0xf94a, 0xf94c, 0xf94e, + 0xf950, 0xf952, 0xf954, 0xf956, 0xf958, 0xf95a, 0xf95c, + 0xf95e, 0xf960, 0xf962, 0xf964, 0xf966, 0xf968, 0xf96a, + 0xf96c, 0xf96e, 0xf970, 0xf972, 0xf974, 0xf976, 0xf978, + 0xf97a, 0xf97c, 0xf97e, 0xf980, 0xf982, 0xf984, 0xf986, + 0xf988, 0xf98a, 0xf98c, 0xf98e, 0xf990, 0xf992, 0xf994, + 0xf996, 0xf998, 0xf99a, 0xf99c, 0xf99e, 0xf9a0, 0xf9a2, + 0xf9a4, 0xf9a6, 0xf9a8, 0xf9aa, 0xf9ac, 0xf9ae, 0xf9b0, + 0xf9b2, 0xf9b4, 0xf9b6, 0xf9b8, 0xf9ba, 0xf9bc, 0xf9be, + 0xf9c0, 0xf9c2, 0xf9c4, 0xf9c6, 0xf9c8, 0xf9ca, 0xf9cc, + 0xf9ce, 0xf9d0, 0xf9d2, 0xf9d4, 0xf9d6, 0xf9d8, 0xf9da, + 0xf9dc, 0xf9de, 0xf9e0, 0xf9e2, 0xf9e4, 0xf9e6, 0xf9e8, + 0xf9ea, 0xf9ec, 0xf9ee, 0xf9f0, 0xf9f2, 0xf9f4, 0xf9f6, + 0xf9f8, 0xf9fa, 0xf9fc, 0xf9fe, 0xf800, 0xf802, 0xf804, + 0xf806, 0xf808, 0xf80a, 0xf80c, 0xf80e, 0xf810, 0xf812, + 0xf814, 0xf816, 0xf818, 0xf81a, 0xf81c, 0xf81e, 0xf820, + 0xf822, 0xf824, 0xf826, 0xf828, 0xf82a, 0xf82c, 0xf82e, + 0xf830, 0xf832, 0xf834, 0xf836, 0xf838, 0xf83a, 0xf83c, + 0xf83e, 0xf840, 0xf842, 0xf844, 0xf846, 0xf848, 0xf84a, + 0xf84c, 0xf84e, 0xf850, 0xf852, 0xf854, 0xf856, 0xf858, + 0xf85a, 0xf85c, 0xf85e, 0xf860, 0xf862, 0xf864, 0xf866, + 0xf868, 0xf86a, 0xf86c, 0xf86e, 0xf870, 0xf872, 0xf874, + 0xf876, 0xf878, 0xf87a, 0xf87c, 0xf87e, 0xf880, 0xf882, + 0xf884, 0xf886, 0xf888, 0xf88a, 0xf88c, 0xf88e, 0xf890, + 0xf892, 0xf894, 0xf896, 0xf898, 0xf89a, 0xf89c, 0xf89e, + 0xf8a0, 0xf8a2, 0xf8a4 +}; + +static const uint16_t rtl8126_2_mac_bps_vals[] = { + 0xe00a, 0xe026, 0xe048, 0xe04c, 0xe04f, 0xe052, 0xe055, + 0xe0ab, 0xe0f8, 0xe141, 0xc716, 0xc616, 0x9ee0, 0xc616, + 0x65c0, 0x1500, 0xf009, 0xc714, 0x66e0, 0x41b5, 0x8ee0, + 0xc611, 0x75c0, 0x4858, 0x9dc0, 0xc707, 0xc608, 0x9ee0, + 0xc608, 0xc502, 0xbd00, 0x0100, 0xe86c, 0xe000, 0xa000, + 0xb404, 0xb430, 0xc070, 0xe926, 0xc2fe, 0x400a, 0xf11a, + 0x63a4, 0x1a00, 0x49b0, 0xf002, 0x4820, 0x49b1, 0xf002, + 0x4821, 0x49b2, 0xf002, 0x4822, 0x49b3, 0xf002, 0x4823, + 0xc411, 0x6380, 0x48b0, 0x8b80, 0x6320, 0x41da, 0x8b20, + 0x6380, 0x4830, 0x8b80, 0xe003, 0x73a4, 0x9b20, 0xc302, + 0xbb00, 0x55e2, 0xc070, 0xe022, 0x4166, 0x9cf6, 0xc602, + 0xbe00, 0x14a6, 0x49d1, 0xc602, 0xbe00, 0x4178, 0x49d1, + 0xc602, 0xbe00, 0x41fe, 0x49d1, 0xc602, 0xbe00, 0x429a, + 0xc74b, 0x76e2, 0xc54a, 0x402e, 0xf034, 0x76e0, 0x402e, + 0xf006, 0xc503, 0xc403, 0xbc00, 0xc0bc, 0x0aae, 0x76f0, + 0x1601, 0xf023, 0xc741, 0x1e04, 0x9ee0, 0x1e40, 0x9ee4, + 0xc63d, 0x9ee8, 0xc73d, 0x76e0, 0x4863, 0x9ee0, 0xc73a, + 0x76e0, 0x48ea, 0x48eb, 0x9ee0, 0xc736, 0x1e01, 0x9ee2, + 0xc72d, 0x76e0, 0x486f, 0x9ee0, 0xc72d, 0x76e0, 0x48e3, + 0x9ee0, 0xc728, 0x1e0e, 0x9ee0, 0xc71d, 0x1e01, 0x9ee4, + 0xe00d, 0x1e00, 0x9ef0, 0x1e05, 0xc715, 0x9ee0, 0xe00a, + 0x1e00, 0x9ee2, 0xc614, 0x75cc, 0x48d2, 0x9dcc, 0x1e04, + 0xc70b, 0x9ee0, 0xb000, 0xb001, 0xb002, 0xb003, 0xb004, + 0xb005, 0xb006, 0xb007, 0xffc0, 0xe428, 0xd3c0, 0xbeef, + 0x5b4a, 0xdc46, 0xe0cc, 0xe84e, 0xc0a2, 0x0100, 0xc010, + 0xe85a, 0xe812, 0xc0b4, 0xc5f4, 0x74a0, 0xc6f3, 0x4026, + 0xf107, 0x74a2, 0xc6ef, 0x4026, 0xf107, 0xc6ed, 0xbe00, + 0x753a, 0xc602, 0xbe00, 0x5a3a, 0x7520, 0x49de, 0xf102, + 0xe7f9, 0xc6a1, 0x67c6, 0x7520, 0x22d2, 0x26dd, 0x1500, + 0xf002, 0xe7f1, 0x7532, 0x26d5, 0x0530, 0x0d6c, 0xc42d, + 0x308d, 0x7540, 0x4025, 0xf11e, 0x7542, 0x4025, 0xf11b, + 0x7544, 0x4025, 0xf118, 0xc423, 0x7546, 0x4025, 0xf114, + 0x7548, 0x4025, 0xf111, 0x754a, 0x4025, 0xf10e, 0xc5c0, + 0xc4c0, 0x9ca2, 0xc6c0, 0x75cc, 0x4852, 0x9dcc, 0xc6b8, + 0x1d7d, 0x9dc2, 0x1d01, 0x9dc0, 0xe7c9, 0xc40b, 0x7546, + 0x4025, 0xf1fc, 0x7548, 0x4025, 0xf1f9, 0x754a, 0x4025, + 0xf1f6, 0xe7c0, 0xffff, 0xeeee, 0xc2a6, 0x7340, 0xc2a5, + 0x4013, 0xf013, 0xc2ac, 0x7340, 0x4835, 0x9b40, 0xc240, + 0x7358, 0x48b7, 0x48b2, 0x9b58, 0x7346, 0x48b7, 0x48b2, + 0x9b46, 0x7340, 0x48b7, 0x48b2, 0x9b40, 0xe012, 0xc29a, + 0x7340, 0x48b5, 0x9b40, 0xc22e, 0x7358, 0x4837, 0x4832, + 0x9b58, 0x7346, 0x4837, 0x4832, 0x9b46, 0x7340, 0x4837, + 0x4832, 0x9b40, 0xc283, 0x7340, 0x49bf, 0xf010, 0xc21b, + 0x7344, 0x1300, 0xf104, 0x1b00, 0xc217, 0x9b40, 0x1b01, + 0xc213, 0x9b44, 0xc213, 0x734c, 0x48b7, 0x9b4c, 0xe008, + 0xc20c, 0x1b00, 0x9b44, 0xc20b, 0x734c, 0x4837, 0x9b4c, + 0xc204, 0xc302, 0xbb00, 0x2384, 0xe092, 0xd3c0, 0xe428, + 0xdc46, 0xc104, 0xc202, 0xba00, 0x234c, 0xd116, 0x6847, + 0x0119, 0x041c, 0x1134 +}; + +static const struct rge_mac_bps rtl8126_2_mac_bps = { + nitems(rtl8126_2_mac_bps_regs), + rtl8126_2_mac_bps_regs, + rtl8126_2_mac_bps_vals +}; + +static const uint16_t rtl8127_mac_bps_regs[] = { + 0xf800, 0xf802, 0xf804, 0xf806, 0xf808, 0xf80a, 0xf80c, + 0xf80e, 0xf810, 0xf812, 0xf814, 0xf816, 0xf818, 0xf81a, + 0xf81c, 0xf81e, 0xf820, 0xf822, 0xf824, 0xf826, 0xf828, + 0xf82a, 0xf82c, 0xf82e, 0xf830, 0xf832, 0xf834, 0xf836, + 0xf838, 0xf83a, 0xf83c, 0xf83e, 0xf840, 0xf842, 0xf844, + 0xf846, 0xf848, 0xf84a, 0xf84c, 0xf84e, 0xf850, 0xf852, + 0xf854, 0xf856, 0xf858, 0xf85a, 0xf85c, 0xf85e, 0xf860, + 0xf862, 0xf864, 0xf866, 0xf868, 0xf86a, 0xf86c, 0xf86e, + 0xf870, 0xf872, 0xf874, 0xf876, 0xf878, 0xf87a, 0xf87c, + 0xf87e, 0xf880, 0xf882, 0xf884, 0xf886, 0xf888, 0xf88a, + 0xf88c, 0xf88e, 0xf890, 0xf892, 0xf894, 0xf896, 0xf898, + 0xf89a, 0xf89c, 0xf89e, 0xf8a0, 0xf8a2, 0xf8a4, 0xf8a6, + 0xf8a8, 0xf8aa, 0xf8ac, 0xf8ae, 0xf8b0, 0xf8b2, 0xf8b4, + 0xf8b6, 0xf8b8, 0xf8ba, 0xf8bc, 0xf8be, 0xf8c0, 0xf8c2, + 0xf8c4, 0xf8c6, 0xf8c8, 0xf8ca, 0xf8cc, 0xf8ce, 0xf8d0, + 0xf8d2, 0xf8d4, 0xf8d6, 0xf8d8, 0xf8da, 0xf8dc, 0xf8de, + 0xf8e0, 0xf8e2, 0xf8e4, 0xf8e6, 0xf8e8, 0xf8ea, 0xf8ec, + 0xf8ee, 0xf8f0, 0xf8f2, 0xf8f4, 0xf8f6, 0xf8f8, 0xf8fa, + 0xf8fc, 0xf8fe, 0xf900, 0xf902, 0xf904, 0xf906, 0xf908, + 0xf90a, 0xf90c, 0xf90e, 0xf910, 0xf912, 0xf914, 0xf916, + 0xf918, 0xf91a, 0xf91c, 0xf91e, 0xf920, 0xf922, 0xf924, + 0xf926, 0xf928, 0xf92a, 0xf92c, 0xf92e, 0xf930, 0xf932, + 0xf934, 0xf936, 0xf938, 0xf93a, 0xf93c, 0xf93e, 0xf940, + 0xf942, 0xf944, 0xf946, 0xf948, 0xf94a, 0xf94c, 0xf94e, + 0xf950, 0xf952, 0xf954, 0xf956, 0xf958, 0xf95a, 0xf95c, + 0xf95e, 0xf960, 0xf962, 0xf964, 0xf966, 0xf968, 0xf96a, + 0xf96c, 0xf96e, 0xf970, 0xf972, 0xf974, 0xf976, 0xf978, + 0xf97a, 0xf97c, 0xf97e, 0xf980, 0xf982, 0xf984, 0xf986, + 0xf988, 0xf98a, 0xf98c, 0xf98e, 0xf990, 0xf992, 0xf994, + 0xf996, 0xf998, 0xf99a, 0xf99c, 0xf99e, 0xf9a0, 0xf9a2, + 0xf9a4, 0xf9a6, 0xf9a8, 0xf9aa, 0xf9ac, 0xf9ae, 0xf9b0, + 0xf9b2, 0xf9b4, 0xf9b6, 0xf9b8, 0xf9ba, 0xf9bc, 0xf9be, + 0xf9c0, 0xf9c2, 0xf9c4, 0xf9c6, 0xf9c8, 0xf9ca, 0xf9cc, + 0xf9ce, 0xf9d0, 0xf9d2, 0xf9d4, 0xf9d6, 0xf9d8, 0xf9da, + 0xf9dc, 0xf9de, 0xf9e0, 0xf9e2, 0xf9e4, 0xf9e6, 0xf9e8, + 0xf9ea, 0xf9ec, 0xf9ee, 0xf9f0, 0xf9f2, 0xf9f4, 0xf9f6, + 0xf9f8, 0xf9fa, 0xf9fc, 0xf9fe, 0xf800, 0xf802, 0xf804, + 0xf806, 0xf808, 0xf80a, 0xf80c, 0xf80e, 0xf810, 0xf812, + 0xf814, 0xf816, 0xf818, 0xf81a, 0xf81c, 0xf81e, 0xf820, + 0xf822, 0xf824, 0xf826, 0xf828, 0xf82a, 0xf82c, 0xf82e, + 0xf830, 0xf832, 0xf834, 0xf836, 0xf838, 0xf83a, 0xf83c, + 0xf83e, 0xf840, 0xf842, 0xf844, 0xf846, 0xf848, 0xf84a, + 0xf84c, 0xf84e, 0xf850, 0xf852, 0xf854, 0xf856, 0xf858, + 0xf85a, 0xf85c, 0xf85e, 0xf860, 0xf862, 0xf864, 0xf866, + 0xf868, 0xf86a, 0xf86c, 0xf86e, 0xf870, 0xf872, 0xf874, + 0xf876, 0xf878, 0xf87a, 0xf87c +}; + +static const uint16_t rtl8127_mac_bps_vals[] = { + 0xe010, 0xe023, 0xe036, 0xe049, 0xe05c, 0xe075, 0xe0b1, + 0xe117, 0xe11b, 0xe11d, 0xe11f, 0xe121, 0xe123, 0xe125, + 0xe127, 0xe129, 0x7020, 0xb405, 0xb404, 0xc50f, 0x74a0, + 0xc50e, 0x4025, 0xf005, 0x4850, 0x4025, 0xf002, 0xe002, + 0x4809, 0xb004, 0xb005, 0xc502, 0xbd00, 0x1522, 0xd006, + 0x0004, 0x7760, 0xb405, 0xb404, 0xc50f, 0x74a0, 0xc50e, + 0x4025, 0xf005, 0x4850, 0x4025, 0xf002, 0xe002, 0x4879, + 0xb004, 0xb005, 0xc002, 0xb800, 0x41e2, 0xd006, 0x0004, + 0x7160, 0xb405, 0xb404, 0xc50f, 0x74a0, 0xc50e, 0x4025, + 0xf005, 0x4850, 0x4025, 0xf002, 0xe002, 0x4819, 0xb004, + 0xb005, 0xc302, 0xbb00, 0x508e, 0xd006, 0x0004, 0x7720, + 0xb405, 0xb404, 0xc50f, 0x74a0, 0xc50e, 0x4025, 0xf005, + 0x4850, 0x4025, 0xf002, 0xe002, 0x4879, 0xb004, 0xb005, + 0xc102, 0xb900, 0x50f8, 0xd006, 0x0004, 0x61a9, 0xb403, + 0xb404, 0xc313, 0x7460, 0xc312, 0x4023, 0xf005, 0x4830, + 0x4023, 0xf002, 0xe003, 0x4997, 0xf003, 0xc00a, 0xe002, + 0xc009, 0xb004, 0xb003, 0xc102, 0xb900, 0x34fc, 0xd006, + 0x0004, 0x02af, 0x041f, 0xb407, 0xb406, 0xb405, 0xb404, + 0xb403, 0xb402, 0xb401, 0xb400, 0x49d2, 0xf116, 0xc62f, + 0x77c0, 0x49f9, 0xf020, 0x49fa, 0xf11e, 0x49f2, 0xf102, + 0xe01b, 0x48f2, 0x9fc0, 0xc625, 0x75c2, 0x4852, 0x9dc2, + 0xc122, 0x7020, 0x4801, 0x4802, 0x9820, 0xe00f, 0xc61a, + 0x77c0, 0x49f2, 0xf10b, 0xc618, 0x77c0, 0x49f2, 0xf007, + 0x48f2, 0x9fc0, 0xc611, 0x75c2, 0x48d2, 0x9dc2, 0xb000, + 0xb001, 0xb002, 0xb003, 0xb004, 0xb005, 0xb006, 0xb007, + 0x9d6c, 0xc502, 0xbd00, 0x0168, 0xe024, 0xc010, 0xd410, + 0xd460, 0xb407, 0xb406, 0xb405, 0xb404, 0xb403, 0xb402, + 0xb401, 0xb400, 0xc152, 0x7020, 0x4981, 0xf043, 0xc050, + 0x7100, 0xb401, 0xc14c, 0x489e, 0x481d, 0x9900, 0xc24a, + 0x7340, 0x49b7, 0xf135, 0xc144, 0x9900, 0xc245, 0x7340, + 0xc447, 0x401c, 0xf109, 0x734c, 0x1301, 0xf12b, 0xc343, + 0x9b40, 0xc33e, 0x9b40, 0xe022, 0xc63a, 0x77c0, 0x48f4, + 0x48f5, 0x48f9, 0x48fa, 0x9fc0, 0xc231, 0x7344, 0x48b4, + 0x9b44, 0xc22e, 0x7340, 0x4830, 0x48b1, 0x4832, 0x483c, + 0x48bd, 0x48be, 0x48bf, 0x9b40, 0xc223, 0xc32a, 0x9b48, + 0xc327, 0x9b46, 0xc324, 0x9b40, 0xc321, 0x9b42, 0xc31e, + 0x9b40, 0xe005, 0xc113, 0x7020, 0x4881, 0x9820, 0xb001, + 0xc010, 0x9900, 0xb000, 0xb001, 0xb002, 0xb003, 0xb004, + 0xb005, 0xb006, 0xb007, 0x2125, 0xc102, 0xb900, 0x1a6c, + 0xd410, 0xc000, 0xe86c, 0xb600, 0xb800, 0xb40a, 0xe024, + 0x5a00, 0x5a81, 0x0073, 0x5a80, 0x0042, 0x0001, 0xc104, + 0xc202, 0xba00, 0x1a2e, 0xc896, 0xc302, 0xbb00, 0x0000, + 0xc002, 0xb800, 0x0000, 0xc002, 0xb800, 0x0000, 0xc502, + 0xbd00, 0x0000, 0xc102, 0xb900, 0x0000, 0xc102, 0xb900, + 0x0000, 0xc602, 0xbe00, 0x0000, 0xc602, 0xbe00, 0x0000, + 0x6961, 0x0019, 0x050c, 0x140c +}; + +static const struct rge_mac_bps rtl8127_mac_bps = { + nitems(rtl8127_mac_bps_regs), + rtl8127_mac_bps_regs, *** 10451 LINES SKIPPED ***home | help
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