Date: Thu, 18 Jul 2013 16:31:43 GMT From: Brooks Davis <brooks@FreeBSD.org> To: Perforce Change Reviews <perforce@FreeBSD.org> Subject: PERFORCE change 231258 for review Message-ID: <201307181631.r6IGVhVr068883@skunkworks.freebsd.org>
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http://p4web.freebsd.org/@@231258?ac=10 Change 231258 by brooks@brooks_zenith on 2013/07/18 16:31:35 Change 231257 should have read: Merge binutils updates from github.com/CTSRD-CHERI/binutils. commit 89479e4e882f9f39203ea8a4117e5eb87d262357 Author: Michael Roe <mroe@cornstalk.org.uk> Date: Thu Jun 6 14:28:08 2013 +0100 Changed the assembler mnemonics from CBTF and CBTT to CBTU and CBTS. commit 90ceb905a43bf7d9c1ea493a96c243c9943687ce Author: Michael Roe <mroe@cornstalk.org.uk> Date: Thu Jun 6 14:02:33 2013 +0100 Added assembler support for the CHERI instructions CBTF (capability branch if tag is false) and CBTF (capability branch if tag is true). commit 74670a3030945e7aa79c5f21ab1315f4010edc0e Author: Michael Roe <mroe@cornstalk.org.uk> Date: Mon Apr 15 12:00:09 2013 +0100 The disassembler now supports negative immediate offsets in capability instructions. commit 78a7cfe697ad34f52bdadcd97872c3d0175cec91 Author: Michael Roe <mroe@cornstalk.org.uk> Date: Fri Mar 22 15:43:49 2013 +0000 Added support for clld and cscd opcodes. Affected files ... .. //depot/projects/ctsrd/cheribsd/src/contrib/binutils/opcodes/mips-dis.c#6 edit .. //depot/projects/ctsrd/cheribsd/src/contrib/binutils/opcodes/mips-opc.c#12 edit Differences ... ==== //depot/projects/ctsrd/cheribsd/src/contrib/binutils/opcodes/mips-dis.c#6 (text+ko) ==== ==== //depot/projects/ctsrd/cheribsd/src/contrib/binutils/opcodes/mips-opc.c#12 (text+ko) ====
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