Date: Thu, 04 Dec 2025 18:02:04 +0000 From: Mitchell Horne <mhorne@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Cc: =?utf-8?Q?Ana=C3=ABll?=e CAZUC <Anaelle.CAZUC@stormshield.eu> Subject: git: 057dae35ffc6 - main - pmc: add alderlake model Message-ID: <6931cc9c.913b.4953e75d@gitrepo.freebsd.org>
index | next in thread | raw e-mail
The branch main has been updated by mhorne: URL: https://cgit.FreeBSD.org/src/commit/?id=057dae35ffc6b17dacc84fa21921e93a17ce12b0 commit 057dae35ffc6b17dacc84fa21921e93a17ce12b0 Author: Anaƫlle CAZUC <Anaelle.CAZUC@stormshield.eu> AuthorDate: 2025-12-04 17:32:39 +0000 Commit: Mitchell Horne <mhorne@FreeBSD.org> CommitDate: 2025-12-04 18:00:55 +0000 pmc: add alderlake model The commit 601925180df4 added the models 6-B7, 6-BA, 6-BF to libpmc, but they must also be added to the hwpmc module to allow pmc to work on those CPUs. Reviewed by: mhorne MFC after: 1 week Fixes: 601925180df4 ("libpmc: add more alderlake models") Sponsored by: Stormshield Differential Revision: https://reviews.freebsd.org/D49255 --- sys/dev/hwpmc/hwpmc_intel.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/sys/dev/hwpmc/hwpmc_intel.c b/sys/dev/hwpmc/hwpmc_intel.c index b195fcb3f362..68693e00c426 100644 --- a/sys/dev/hwpmc/hwpmc_intel.c +++ b/sys/dev/hwpmc/hwpmc_intel.c @@ -211,6 +211,9 @@ pmc_intel_initialize(void) break; case 0x97: case 0x9A: + case 0xB7: + case 0xBA: + case 0xBF: cputype = PMC_CPU_INTEL_ALDERLAKE; nclasses = 3; break;help
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?6931cc9c.913b.4953e75d>
