Date: Wed, 1 Jun 2016 13:43:43 +0000 (UTC) From: Ruslan Bukin <br@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r301121 - head/sys/modules Message-ID: <201606011343.u51DhhHA070014@repo.freebsd.org>
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Author: br Date: Wed Jun 1 13:43:43 2016 New Revision: 301121 URL: https://svnweb.freebsd.org/changeset/base/301121 Log: Don't build some modules on RISC-V. Submitted by: Yukishige Shibata <y-shibat@mtd.biglobe.ne.jp> Modified: head/sys/modules/Makefile Modified: head/sys/modules/Makefile ============================================================================== --- head/sys/modules/Makefile Wed Jun 1 12:19:00 2016 (r301120) +++ head/sys/modules/Makefile Wed Jun 1 13:43:43 2016 (r301121) @@ -499,7 +499,7 @@ _txp= txp .if ${MK_SOURCELESS_UCODE} != "no" && ${MACHINE_CPUARCH} != "arm" && \ ${MACHINE_ARCH:C/mips(el)?/mips/} != "mips" && \ - ${MACHINE_ARCH} != "powerpc" + ${MACHINE_ARCH} != "powerpc" && ${MACHINE_CPUARCH} != "riscv" _cxgbe= cxgbe .endif @@ -508,7 +508,8 @@ SUBDIR+= zfs .endif .if ${MACHINE_CPUARCH} != "aarch64" && ${MACHINE_CPUARCH} != "arm" && \ - ${MACHINE_CPUARCH} != "mips" && ${MACHINE_CPUARCH} != "powerpc" + ${MACHINE_CPUARCH} != "mips" && ${MACHINE_CPUARCH} != "powerpc" && \ + ${MACHINE_CPUARCH} != "riscv" _syscons= syscons _vpo= vpo .endif
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